Lines Matching defs:vgdev

39 	struct virtio_gpu_device *vgdev = dev->dev_private;
48 	virtio_gpu_cmd_context_create(vgdev, vfpriv->ctx_id,
59 	struct virtio_gpu_device *vgdev = dev->dev_private;
62 	return virtio_gpu_mode_dumb_mmap(file, vgdev->ddev,
77 	struct virtio_gpu_device *vgdev = dev->dev_private;
89 	if (vgdev->has_virgl_3d == false)
111 		if (!dma_fence_match_context(in_fence, vgdev->fence_drv.context))
162 	out_fence = virtio_gpu_fence_alloc(vgdev);
180 	virtio_gpu_cmd_submit(vgdev, buf, exbuf->size,
183 	virtio_gpu_notify(vgdev);
205 	struct virtio_gpu_device *vgdev = dev->dev_private;
211 		value = vgdev->has_virgl_3d == true ? 1 : 0;
228 	struct virtio_gpu_device *vgdev = dev->dev_private;
237 	if (vgdev->has_virgl_3d) {
268 	fence = virtio_gpu_fence_alloc(vgdev);
271 	ret = virtio_gpu_object_create(vgdev, &params, &qobj, fence);
320 	struct virtio_gpu_device *vgdev = dev->dev_private;
328 	if (vgdev->has_virgl_3d == false)
340 	fence = virtio_gpu_fence_alloc(vgdev);
346 		(vgdev, vfpriv->ctx_id, offset, args->level,
349 	virtio_gpu_notify(vgdev);
362 	struct virtio_gpu_device *vgdev = dev->dev_private;
374 	if (!vgdev->has_virgl_3d) {
376 			(vgdev, offset,
386 		fence = virtio_gpu_fence_alloc(vgdev);
391 			(vgdev,
396 	virtio_gpu_notify(vgdev);
436 	struct virtio_gpu_device *vgdev = dev->dev_private;
445 	if (vgdev->num_capsets == 0)
452 	spin_lock(&vgdev->display_info_lock);
453 	for (i = 0; i < vgdev->num_capsets; i++) {
454 		if (vgdev->capsets[i].id == args->cap_set_id) {
455 			if (vgdev->capsets[i].max_version >= args->cap_set_ver) {
463 		spin_unlock(&vgdev->display_info_lock);
467 	host_caps_size = vgdev->capsets[found_valid].max_size;
471 	list_for_each_entry(cache_ent, &vgdev->cap_cache, head) {
474 			spin_unlock(&vgdev->display_info_lock);
478 	spin_unlock(&vgdev->display_info_lock);
481 	ret = virtio_gpu_cmd_get_capset(vgdev, found_valid, args->cap_set_ver,
485 	virtio_gpu_notify(vgdev);
488 	ret = wait_event_timeout(vgdev->resp_wq,