Lines Matching defs:engine

206  * Fire a blit engine.
210 via_fire_dmablit(struct drm_device *dev, drm_via_sg_info_t *vsg, int engine)
214 via_write(dev_priv, VIA_PCI_DMA_MAR0 + engine*0x10, 0);
215 via_write(dev_priv, VIA_PCI_DMA_DAR0 + engine*0x10, 0);
216 via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DD | VIA_DMA_CSR_TD |
218 via_write(dev_priv, VIA_PCI_DMA_MR0 + engine*0x04, VIA_DMA_MR_CM | VIA_DMA_MR_TDIE);
219 via_write(dev_priv, VIA_PCI_DMA_BCR0 + engine*0x10, 0);
220 via_write(dev_priv, VIA_PCI_DMA_DPR0 + engine*0x10, vsg->chain_start);
222 via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_DE | VIA_DMA_CSR_TS);
223 via_read(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04);
287 via_abort_dmablit(struct drm_device *dev, int engine)
291 via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TA);
295 via_dmablit_engine_off(struct drm_device *dev, int engine)
299 via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD | VIA_DMA_CSR_DD);
307 * task. Basically the task of the interrupt handler is to submit a new blit to the engine, while
312 via_dmablit_handler(struct drm_device *dev, int engine, int from_irq)
315 drm_via_blitq_t *blitq = dev_priv->blit_queues + engine;
321 DRM_DEBUG("DMA blit handler called. engine = %d, from_irq = %d, blitq = 0x%lx\n",
322 engine, from_irq, (unsigned long) blitq);
330 ((status = via_read(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04)) & VIA_DMA_CSR_TD);
349 via_write(dev_priv, VIA_PCI_DMA_CSR0 + engine*0x04, VIA_DMA_CSR_TD);
361 via_abort_dmablit(dev, engine);
368 via_fire_dmablit(dev, blitq->blits[cur], engine);
378 via_dmablit_engine_off(dev, engine);
395 via_dmablit_active(drm_via_blitq_t *blitq, int engine, uint32_t handle, wait_queue_head_t **queue)
427 via_dmablit_sync(struct drm_device *dev, uint32_t handle, int engine)
431 drm_via_blitq_t *blitq = dev_priv->blit_queues + engine;
435 if (via_dmablit_active(blitq, engine, handle, &queue)) {
437 !via_dmablit_active(blitq, engine, handle, NULL));
439 DRM_DEBUG("DMA blit sync handle 0x%x engine %d returned %d\n",
440 handle, engine, ret);
447 * A timer that regularly polls the blit engine in cases where we don't have interrupts:
461 int engine = (int)
464 DRM_DEBUG("Polling timer called for engine %d, jiffies %lu\n", engine,
467 via_dmablit_handler(dev, engine, 0);
477 via_dmablit_handler(dev, engine, 0);
488 * blit engine only and may not be called on each interrupt.
502 DRM_DEBUG("Workqueue task called for blit engine %ld\n", (unsigned long)
677 via_dmablit_grab_slot(drm_via_blitq_t *blitq, int engine)
727 int engine;
735 engine = (xfer->to_fb) ? 0 : 1;
736 blitq = dev_priv->blit_queues + engine;
737 if (0 != (ret = via_dmablit_grab_slot(blitq, engine)))
757 xfer->sync.engine = engine;
759 via_dmablit_handler(dev, engine, 0);
777 if (sync->engine >= VIA_NUM_BLIT_ENGINES)
780 err = via_dmablit_sync(dev, sync->sync_handle, sync->engine);