Lines Matching defs:v3d
22 v3d_init_core(struct v3d_dev *v3d, int core)
30 if (v3d->ver < 40)
42 v3d_init_hw_state(struct v3d_dev *v3d)
44 v3d_init_core(v3d, 0);
48 v3d_idle_axi(struct v3d_dev *v3d, int core)
61 v3d_idle_gca(struct v3d_dev *v3d)
63 if (v3d->ver >= 41)
76 v3d_reset_by_bridge(struct v3d_dev *v3d)
99 v3d_reset_v3d(struct v3d_dev *v3d)
101 if (v3d->reset)
102 reset_control_reset(v3d->reset);
104 v3d_reset_by_bridge(v3d);
106 v3d_init_hw_state(v3d);
110 v3d_reset(struct v3d_dev *v3d)
112 struct drm_device *dev = &v3d->drm;
121 v3d_idle_axi(v3d, 0);
123 v3d_idle_gca(v3d);
124 v3d_reset_v3d(v3d);
126 v3d_mmu_set_page_table(v3d);
127 v3d_irq_reset(v3d);
133 v3d_flush_l3(struct v3d_dev *v3d)
135 if (v3d->ver < 41) {
141 if (v3d->ver < 33) {
152 v3d_invalidate_l2c(struct v3d_dev *v3d, int core)
154 if (v3d->ver > 32)
164 v3d_flush_l2t(struct v3d_dev *v3d, int core)
173 mutex_lock(&v3d->cache_clean_lock);
177 mutex_unlock(&v3d->cache_clean_lock);
189 v3d_clean_caches(struct v3d_dev *v3d)
191 struct drm_device *dev = &v3d->drm;
202 mutex_lock(&v3d->cache_clean_lock);
212 mutex_unlock(&v3d->cache_clean_lock);
219 v3d_invalidate_slices(struct v3d_dev *v3d, int core)
229 v3d_invalidate_caches(struct v3d_dev *v3d)
236 v3d_flush_l3(v3d);
237 v3d_invalidate_l2c(v3d, 0);
238 v3d_flush_l2t(v3d, 0);
239 v3d_invalidate_slices(v3d, 0);
247 * to v3d, so we don't attach dma-buf fences to them.
373 pm_runtime_mark_last_busy(job->v3d->drm.dev);
374 pm_runtime_put_autosuspend(job->v3d->drm.dev);
432 v3d_job_init(struct v3d_dev *v3d, struct drm_file *file_priv,
439 job->v3d = v3d;
442 ret = pm_runtime_get_sync(v3d->drm.dev);
461 pm_runtime_put_autosuspend(v3d->drm.dev);
528 struct v3d_dev *v3d = to_v3d_dev(dev);
538 trace_v3d_submit_cl_ioctl(&v3d->drm, args->rcl_start, args->rcl_end);
554 ret = v3d_job_init(v3d, file_priv, &render->base,
568 ret = v3d_job_init(v3d, file_priv, &bin->base,
591 ret = v3d_job_init(v3d, file_priv, clean_job, v3d_job_free, 0);
612 mutex_lock(&v3d->sched_lock);
639 mutex_unlock(&v3d->sched_lock);
656 mutex_unlock(&v3d->sched_lock);
682 struct v3d_dev *v3d = to_v3d_dev(dev);
689 trace_v3d_submit_tfu_ioctl(&v3d->drm, args->iia);
695 ret = v3d_job_init(v3d, file_priv, &job->base,
739 mutex_lock(&v3d->sched_lock);
743 mutex_unlock(&v3d->sched_lock);
755 mutex_unlock(&v3d->sched_lock);
777 struct v3d_dev *v3d = to_v3d_dev(dev);
785 trace_v3d_submit_csd_ioctl(&v3d->drm, args->cfg[5], args->cfg[6]);
787 if (!v3d_has_csd(v3d)) {
796 ret = v3d_job_init(v3d, file_priv, &job->base,
810 ret = v3d_job_init(v3d, file_priv, clean_job, v3d_job_free, 0);
828 mutex_lock(&v3d->sched_lock);
841 mutex_unlock(&v3d->sched_lock);
855 mutex_unlock(&v3d->sched_lock);
868 struct v3d_dev *v3d = to_v3d_dev(dev);
873 v3d->queue[i].fence_context = dma_fence_context_alloc(1);
875 spin_lock_init(&v3d->mm_lock);
876 spin_lock_init(&v3d->job_lock);
877 mutex_init(&v3d->bo_lock);
878 mutex_init(&v3d->reset_lock);
879 mutex_init(&v3d->sched_lock);
880 mutex_init(&v3d->cache_clean_lock);
886 drm_mm_init(&v3d->mm, 1, pt_size / sizeof(u32) - 1);
888 v3d->pt = dma_alloc_wc(v3d->drm.dev, pt_size,
889 &v3d->pt_paddr,
891 if (!v3d->pt) {
892 drm_mm_takedown(&v3d->mm);
893 dev_err(v3d->drm.dev,
899 v3d_init_hw_state(v3d);
900 v3d_mmu_set_page_table(v3d);
902 ret = v3d_sched_init(v3d);
904 drm_mm_takedown(&v3d->mm);
905 dma_free_coherent(v3d->drm.dev, 4096 * 1024, (void *)v3d->pt,
906 v3d->pt_paddr);
915 struct v3d_dev *v3d = to_v3d_dev(dev);
917 v3d_sched_fini(v3d);
922 WARN_ON(v3d->bin_job);
923 WARN_ON(v3d->render_job);
925 drm_mm_takedown(&v3d->mm);
927 dma_free_coherent(v3d->drm.dev, 4096 * 1024, (void *)v3d->pt,
928 v3d->pt_paddr);