Lines Matching refs:pclk
450 unsigned long pclk;
1156 const u64 pclk = (u64)mode->clock * 1000;
1162 if (!link_rate || !link->lanes || !pclk || !config->bits_per_pixel)
1165 input = pclk * config->bits_per_pixel;
1173 params.num_clocks = div_u64(link_rate * mode->hdisplay, pclk);
1224 config->hblank_symbols = div_u64(num, pclk);
1233 config->vblank_symbols = div_u64(num, pclk);
1806 unsigned long pclk = crtc_state->mode.clock * 1000;
1817 if (pclk >= 340000000) {
1819 state->pclk = pclk / 2;
1822 state->pclk = pclk;
1826 pclk, 0);
2256 unsigned long rate, pclk;
2263 pclk = mode->clock * 1000;
2429 DRM_DEBUG_KMS("setting clock to %lu Hz, mode: %lu Hz\n", rate, pclk);