Lines Matching refs:value
31 unsigned long value;
85 tegra_dc_writel(dc, table[i].value, table[i].offset);
101 u32 value;
105 value = DE_SELECT_ACTIVE | DE_CONTROL_NORMAL;
106 tegra_dc_writel(rgb->dc, value, DC_DISP_DATA_ENABLE_OPTIONS);
109 value = tegra_dc_readl(rgb->dc, DC_COM_PIN_OUTPUT_POLARITY(1));
110 value &= ~LVS_OUTPUT_POLARITY_LOW;
111 value &= ~LHS_OUTPUT_POLARITY_LOW;
112 tegra_dc_writel(rgb->dc, value, DC_COM_PIN_OUTPUT_POLARITY(1));
115 value = DISP_DATA_FORMAT_DF1P1C | DISP_ALIGNMENT_MSB |
117 tegra_dc_writel(rgb->dc, value, DC_DISP_DISP_INTERFACE_CONTROL);
120 value = SC0_H_QUALIFIER_NONE | SC1_H_QUALIFIER_NONE;
121 tegra_dc_writel(rgb->dc, value, DC_DISP_SHIFT_CLOCK_OPTIONS);