Lines Matching defs:frontend
79 static void sun4i_frontend_scaler_init(struct sun4i_frontend *frontend)
83 if (frontend->data->has_coef_access_ctrl)
84 regmap_write_bits(frontend->regs, SUN4I_FRONTEND_FRM_CTRL_REG,
89 regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZCOEF0_REG(i),
91 regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZCOEF0_REG(i),
93 regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZCOEF1_REG(i),
95 regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZCOEF1_REG(i),
97 regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTCOEF_REG(i),
99 regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTCOEF_REG(i),
103 if (frontend->data->has_coef_rdy)
104 regmap_write_bits(frontend->regs,
110 int sun4i_frontend_init(struct sun4i_frontend *frontend)
112 return pm_runtime_get_sync(frontend->dev);
116 void sun4i_frontend_exit(struct sun4i_frontend *frontend)
118 pm_runtime_put(frontend->dev);
156 void sun4i_frontend_update_buffer(struct sun4i_frontend *frontend,
179 regmap_write(frontend->regs, SUN4I_FRONTEND_TB_OFF0_REG,
186 regmap_write(frontend->regs, SUN4I_FRONTEND_TB_OFF1_REG,
194 regmap_write(frontend->regs, SUN4I_FRONTEND_TB_OFF2_REG,
209 regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD0_REG,
213 regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD1_REG,
217 regmap_write(frontend->regs, SUN4I_FRONTEND_LINESTRD2_REG,
227 regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR0_REG, paddr);
233 regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR1_REG,
241 regmap_write(frontend->regs, SUN4I_FRONTEND_BUF_ADDR2_REG,
403 int sun4i_frontend_update_formats(struct sun4i_frontend *frontend,
447 regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZPHASE_REG,
448 frontend->data->ch_phase[0]);
449 regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZPHASE_REG,
450 frontend->data->ch_phase[ch1_phase_idx]);
451 regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTPHASE0_REG,
452 frontend->data->ch_phase[0]);
453 regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTPHASE0_REG,
454 frontend->data->ch_phase[ch1_phase_idx]);
455 regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTPHASE1_REG,
456 frontend->data->ch_phase[0]);
457 regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTPHASE1_REG,
458 frontend->data->ch_phase[ch1_phase_idx]);
471 regmap_write(frontend->regs,
478 regmap_update_bits(frontend->regs, SUN4I_FRONTEND_BYPASS_REG,
481 regmap_write(frontend->regs, SUN4I_FRONTEND_INPUT_FMT_REG,
489 regmap_write(frontend->regs, SUN4I_FRONTEND_OUTPUT_FMT_REG,
496 void sun4i_frontend_update_coord(struct sun4i_frontend *frontend,
514 regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_INSIZE_REG,
516 regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_INSIZE_REG,
519 regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_OUTSIZE_REG,
521 regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_OUTSIZE_REG,
524 regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_HORZFACT_REG,
526 regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_HORZFACT_REG,
529 regmap_write(frontend->regs, SUN4I_FRONTEND_CH0_VERTFACT_REG,
531 regmap_write(frontend->regs, SUN4I_FRONTEND_CH1_VERTFACT_REG,
534 regmap_write_bits(frontend->regs, SUN4I_FRONTEND_FRM_CTRL_REG,
540 int sun4i_frontend_enable(struct sun4i_frontend *frontend)
542 regmap_write_bits(frontend->regs, SUN4I_FRONTEND_FRM_CTRL_REG,
561 struct sun4i_frontend *frontend;
567 frontend = devm_kzalloc(dev, sizeof(*frontend), GFP_KERNEL);
568 if (!frontend)
571 dev_set_drvdata(dev, frontend);
572 frontend->dev = dev;
573 frontend->node = dev->of_node;
575 frontend->data = of_device_get_match_data(dev);
576 if (!frontend->data)
584 frontend->regs = devm_regmap_init_mmio(dev, regs,
586 if (IS_ERR(frontend->regs)) {
587 dev_err(dev, "Couldn't create the frontend regmap\n");
588 return PTR_ERR(frontend->regs);
591 frontend->reset = devm_reset_control_get(dev, NULL);
592 if (IS_ERR(frontend->reset)) {
594 return PTR_ERR(frontend->reset);
597 frontend->bus_clk = devm_clk_get(dev, "ahb");
598 if (IS_ERR(frontend->bus_clk)) {
600 return PTR_ERR(frontend->bus_clk);
603 frontend->mod_clk = devm_clk_get(dev, "mod");
604 if (IS_ERR(frontend->mod_clk)) {
606 return PTR_ERR(frontend->mod_clk);
609 frontend->ram_clk = devm_clk_get(dev, "ram");
610 if (IS_ERR(frontend->ram_clk)) {
612 return PTR_ERR(frontend->ram_clk);
615 list_add_tail(&frontend->list, &drv->frontend_list);
624 struct sun4i_frontend *frontend = dev_get_drvdata(dev);
626 list_del(&frontend->list);
649 struct sun4i_frontend *frontend = dev_get_drvdata(dev);
652 clk_set_rate(frontend->mod_clk, 300000000);
654 clk_prepare_enable(frontend->bus_clk);
655 clk_prepare_enable(frontend->mod_clk);
656 clk_prepare_enable(frontend->ram_clk);
658 ret = reset_control_reset(frontend->reset);
664 regmap_update_bits(frontend->regs, SUN4I_FRONTEND_EN_REG,
668 sun4i_frontend_scaler_init(frontend);
675 struct sun4i_frontend *frontend = dev_get_drvdata(dev);
677 clk_disable_unprepare(frontend->ram_clk);
678 clk_disable_unprepare(frontend->mod_clk);
679 clk_disable_unprepare(frontend->bus_clk);
681 reset_control_assert(frontend->reset);
703 .compatible = "allwinner,sun4i-a10-display-frontend",
707 .compatible = "allwinner,sun7i-a20-display-frontend",
711 .compatible = "allwinner,sun8i-a23-display-frontend",
715 .compatible = "allwinner,sun8i-a33-display-frontend",
727 .name = "sun4i-frontend",