Lines Matching defs:val
46 u32 val;
48 regmap_read(dclk->regmap, SUN4I_TCON0_DCLK_REG, &val);
50 return val & BIT(SUN4I_TCON0_DCLK_GATE_BIT);
57 u32 val;
59 regmap_read(dclk->regmap, SUN4I_TCON0_DCLK_REG, &val);
61 val >>= SUN4I_TCON0_DCLK_DIV_SHIFT;
62 val &= (1 << SUN4I_TCON0_DCLK_DIV_WIDTH) - 1;
64 if (!val)
65 val = 1;
67 return parent_rate / val;
128 u32 val;
130 regmap_read(dclk->regmap, SUN4I_TCON0_IO_POL_REG, &val);
132 val >>= 28;
133 val &= 3;
135 return val * 120;
141 u32 val = degrees / 120;
143 val <<= 28;
147 val);