Lines Matching defs:hqvdp
29 #define HQVDP_FMW_NAME "hqvdp-stih407.bin"
331 * @plane: plane structure for hqvdp it self
368 * @hqvdp: hqvdp structure
376 static int sti_hqvdp_get_free_cmd(struct sti_hqvdp *hqvdp)
379 u32 cmd = hqvdp->hqvdp_cmd_paddr;
382 curr_cmd = readl(hqvdp->regs + HQVDP_MBX_CURRENT_CMD);
383 next_cmd = readl(hqvdp->regs + HQVDP_MBX_NEXT_CMD);
396 * @hqvdp: hqvdp structure
404 static int sti_hqvdp_get_curr_cmd(struct sti_hqvdp *hqvdp)
407 u32 cmd = hqvdp->hqvdp_cmd_paddr;
410 curr_cmd = readl(hqvdp->regs + HQVDP_MBX_CURRENT_CMD);
424 * @hqvdp: hqvdp structure
432 static int sti_hqvdp_get_next_cmd(struct sti_hqvdp *hqvdp)
435 dma_addr_t cmd = hqvdp->hqvdp_cmd_paddr;
438 next_cmd = readl(hqvdp->regs + HQVDP_MBX_NEXT_CMD);
451 readl(hqvdp->regs + reg))
566 struct sti_hqvdp *hqvdp = (struct sti_hqvdp *)node->info_ent->data;
571 sti_plane_to_str(&hqvdp->plane), hqvdp->regs);
577 infoxp70 = readl(hqvdp->regs + HQVDP_MBX_INFO_XP70);
590 if (readl(hqvdp->regs + HQVDP_MBX_STARTUP_CTRL1)
596 if (readl(hqvdp->regs + HQVDP_MBX_STARTUP_CTRL2)
605 if (!(readl(hqvdp->regs + HQVDP_MBX_SOFT_VSYNC) & 3))
611 cmd = readl(hqvdp->regs + HQVDP_MBX_CURRENT_CMD);
612 cmd_offset = sti_hqvdp_get_curr_cmd(hqvdp);
616 virt = hqvdp->hqvdp_cmd + cmd_offset;
623 cmd = readl(hqvdp->regs + HQVDP_MBX_NEXT_CMD);
624 cmd_offset = sti_hqvdp_get_next_cmd(hqvdp);
628 virt = hqvdp->hqvdp_cmd + cmd_offset;
639 { "hqvdp", hqvdp_dbg_show, 0, NULL },
642 static void hqvdp_debugfs_init(struct sti_hqvdp *hqvdp, struct drm_minor *minor)
647 hqvdp_debugfs_files[i].data = hqvdp;
713 * @hqvdp: hqvdp pointer
732 static bool sti_hqvdp_check_hw_scaling(struct sti_hqvdp *hqvdp,
740 lfw = mode->htotal * (clk_get_rate(hqvdp->clk) / 1000000);
750 * @hqvdp: hqvdp pointer
754 static void sti_hqvdp_disable(struct sti_hqvdp *hqvdp)
758 DRM_DEBUG_DRIVER("%s\n", sti_plane_to_str(&hqvdp->plane));
761 if (sti_vtg_unregister_client(hqvdp->vtg, &hqvdp->vtg_nb))
765 writel(0, hqvdp->regs + HQVDP_MBX_NEXT_CMD);
768 if (readl(hqvdp->regs + HQVDP_MBX_INFO_XP70)
775 clk_disable_unprepare(hqvdp->clk_pix_main);
780 hqvdp->plane.status = STI_PLANE_DISABLED;
781 hqvdp->vtg_registered = false;
797 struct sti_hqvdp *hqvdp = container_of(nb, struct sti_hqvdp, vtg_nb);
806 if (hqvdp->plane.status == STI_PLANE_FLUSHING) {
809 sti_plane_to_str(&hqvdp->plane));
811 sti_hqvdp_disable(hqvdp);
814 if (hqvdp->btm_field_pending) {
816 btm_cmd_offset = sti_hqvdp_get_free_cmd(hqvdp);
817 top_cmd_offest = sti_hqvdp_get_curr_cmd(hqvdp);
823 btm_cmd = hqvdp->hqvdp_cmd + btm_cmd_offset;
824 top_cmd = hqvdp->hqvdp_cmd + top_cmd_offest;
835 writel(hqvdp->hqvdp_cmd_paddr + btm_cmd_offset,
836 hqvdp->regs + HQVDP_MBX_NEXT_CMD);
838 hqvdp->btm_field_pending = false;
840 dev_dbg(hqvdp->dev, "%s Posted command:0x%x\n",
841 __func__, hqvdp->hqvdp_cmd_paddr);
843 sti_plane_update_fps(&hqvdp->plane, false, true);
849 static void sti_hqvdp_init(struct sti_hqvdp *hqvdp)
854 hqvdp->vtg_nb.notifier_call = sti_hqvdp_vtg_cb;
858 hqvdp->hqvdp_cmd = dma_alloc_wc(hqvdp->dev, size,
861 if (!hqvdp->hqvdp_cmd) {
866 hqvdp->hqvdp_cmd_paddr = (u32)dma_addr;
867 memset(hqvdp->hqvdp_cmd, 0, size);
870 static void sti_hqvdp_init_plugs(struct sti_hqvdp *hqvdp)
873 writel(PLUG_PAGE_SIZE_256, hqvdp->regs + HQVDP_RD_PLUG_PAGE_SIZE);
874 writel(PLUG_MIN_OPC_8, hqvdp->regs + HQVDP_RD_PLUG_MIN_OPC);
875 writel(PLUG_MAX_OPC_64, hqvdp->regs + HQVDP_RD_PLUG_MAX_OPC);
876 writel(PLUG_MAX_CHK_2X, hqvdp->regs + HQVDP_RD_PLUG_MAX_CHK);
877 writel(PLUG_MAX_MSG_1X, hqvdp->regs + HQVDP_RD_PLUG_MAX_MSG);
878 writel(PLUG_MIN_SPACE_1, hqvdp->regs + HQVDP_RD_PLUG_MIN_SPACE);
879 writel(PLUG_CONTROL_ENABLE, hqvdp->regs + HQVDP_RD_PLUG_CONTROL);
881 writel(PLUG_PAGE_SIZE_256, hqvdp->regs + HQVDP_WR_PLUG_PAGE_SIZE);
882 writel(PLUG_MIN_OPC_8, hqvdp->regs + HQVDP_WR_PLUG_MIN_OPC);
883 writel(PLUG_MAX_OPC_64, hqvdp->regs + HQVDP_WR_PLUG_MAX_OPC);
884 writel(PLUG_MAX_CHK_2X, hqvdp->regs + HQVDP_WR_PLUG_MAX_CHK);
885 writel(PLUG_MAX_MSG_1X, hqvdp->regs + HQVDP_WR_PLUG_MAX_MSG);
886 writel(PLUG_MIN_SPACE_1, hqvdp->regs + HQVDP_WR_PLUG_MIN_SPACE);
887 writel(PLUG_CONTROL_ENABLE, hqvdp->regs + HQVDP_WR_PLUG_CONTROL);
892 * @hqvdp: hqvdp pointer
896 static void sti_hqvdp_start_xp70(struct sti_hqvdp *hqvdp)
911 if (hqvdp->xp70_initialized) {
917 if (request_firmware(&firmware, HQVDP_FMW_NAME, hqvdp->dev)) {
953 if (clk_prepare_enable(hqvdp->clk))
957 writel(SW_RESET_CTRL_FULL, hqvdp->regs + HQVDP_MBX_SW_RESET_CTRL);
960 if (readl(hqvdp->regs + HQVDP_MBX_STARTUP_CTRL1)
967 clk_disable_unprepare(hqvdp->clk);
973 writel(fw_rd_plug[i], hqvdp->regs + HQVDP_RD_PLUG + i * 4);
975 writel(fw_wr_plug[i], hqvdp->regs + HQVDP_WR_PLUG + i * 4);
977 sti_hqvdp_init_plugs(hqvdp);
980 writel(STARTUP_CTRL1_AUTH_IDLE, hqvdp->regs + HQVDP_MBX_STARTUP_CTRL1);
983 writel(SOFT_VSYNC_SW_CTRL_IRQ, hqvdp->regs + HQVDP_MBX_SOFT_VSYNC);
984 writel(0, hqvdp->regs + HQVDP_MBX_NEXT_CMD);
988 writel(fw_pmem[i], hqvdp->regs + HQVDP_PMEM + i * 4);
990 writel(fw_dmem[i], hqvdp->regs + HQVDP_DMEM + i * 4);
993 writel(STARTUP_CTRL2_FETCH_EN, hqvdp->regs + HQVDP_MBX_STARTUP_CTRL2);
997 if (readl(hqvdp->regs + HQVDP_MBX_INFO_XP70)
1004 clk_disable_unprepare(hqvdp->clk);
1009 writel(SOFT_VSYNC_HW, hqvdp->regs + HQVDP_MBX_SOFT_VSYNC);
1013 hqvdp->xp70_initialized = true;
1023 struct sti_hqvdp *hqvdp = to_sti_hqvdp(plane);
1047 if (mode->clock && !sti_hqvdp_check_hw_scaling(hqvdp, mode,
1076 if (!hqvdp->xp70_initialized)
1078 sti_hqvdp_start_xp70(hqvdp);
1080 if (!hqvdp->vtg_registered) {
1082 if (clk_prepare_enable(hqvdp->clk_pix_main)) {
1088 if (sti_vtg_register_client(hqvdp->vtg,
1089 &hqvdp->vtg_nb,
1092 clk_disable_unprepare(hqvdp->clk_pix_main);
1095 hqvdp->vtg_registered = true;
1114 struct sti_hqvdp *hqvdp = to_sti_hqvdp(plane);
1154 cmd_offset = sti_hqvdp_get_free_cmd(hqvdp);
1159 cmd = hqvdp->hqvdp_cmd + cmd_offset;
1225 writel(hqvdp->hqvdp_cmd_paddr + cmd_offset,
1226 hqvdp->regs + HQVDP_MBX_NEXT_CMD);
1230 hqvdp->btm_field_pending = true;
1232 dev_dbg(hqvdp->dev, "%s Posted command:0x%x\n",
1233 __func__, hqvdp->hqvdp_cmd_paddr + cmd_offset);
1275 struct sti_hqvdp *hqvdp = to_sti_hqvdp(plane);
1277 hqvdp_debugfs_init(hqvdp, drm_plane->dev->primary);
1295 struct sti_hqvdp *hqvdp = dev_get_drvdata(dev);
1298 hqvdp->plane.desc = desc;
1299 hqvdp->plane.status = STI_PLANE_DISABLED;
1301 sti_hqvdp_init(hqvdp);
1303 res = drm_universal_plane_init(drm_dev, &hqvdp->plane.drm_plane, 1,
1313 drm_plane_helper_add(&hqvdp->plane.drm_plane, &sti_hqvdp_helpers_funcs);
1315 sti_plane_init_property(&hqvdp->plane, DRM_PLANE_TYPE_OVERLAY);
1317 return &hqvdp->plane.drm_plane;
1322 struct sti_hqvdp *hqvdp = dev_get_drvdata(dev);
1328 hqvdp->drm_dev = drm_dev;
1331 plane = sti_hqvdp_create(drm_dev, hqvdp->dev, STI_HQVDP_0);
1353 struct sti_hqvdp *hqvdp;
1358 hqvdp = devm_kzalloc(dev, sizeof(*hqvdp), GFP_KERNEL);
1359 if (!hqvdp) {
1364 hqvdp->dev = dev;
1372 hqvdp->regs = devm_ioremap(dev, res->start, resource_size(res));
1373 if (!hqvdp->regs) {
1379 hqvdp->clk = devm_clk_get(dev, "hqvdp");
1380 hqvdp->clk_pix_main = devm_clk_get(dev, "pix_main");
1381 if (IS_ERR(hqvdp->clk) || IS_ERR(hqvdp->clk_pix_main)) {
1387 hqvdp->reset = devm_reset_control_get(dev, "hqvdp");
1388 if (!IS_ERR(hqvdp->reset))
1389 reset_control_deassert(hqvdp->reset);
1393 hqvdp->vtg = of_vtg_find(vtg_np);
1396 platform_set_drvdata(pdev, hqvdp);
1408 { .compatible = "st,stih407-hqvdp", },
1415 .name = "sti-hqvdp",