Lines Matching refs:gdp
111 * @regs: gdp registers
112 * @clk_pix: pixel clock for the current gdp
113 * @clk_main_parent: gdp parent clock if main path used
114 * @clk_aux_parent: gdp parent clock if aux path used
147 readl(gdp->regs + reg ## _OFFSET))
181 static void gdp_dbg_nvn(struct seq_file *s, struct sti_gdp *gdp, int val)
187 if (gdp->node_list[i].top_field_paddr == val) {
188 base = gdp->node_list[i].top_field;
191 if (gdp->node_list[i].btm_field_paddr == val) {
192 base = gdp->node_list[i].btm_field;
216 struct sti_gdp *gdp = (struct sti_gdp *)node->info_ent->data;
217 struct drm_plane *drm_plane = &gdp->plane.drm_plane;
225 sti_plane_to_str(&gdp->plane), gdp->regs);
228 gdp_dbg_ctl(s, readl(gdp->regs + GAM_GDP_CTL_OFFSET));
231 gdp_dbg_vpo(s, readl(gdp->regs + GAM_GDP_VPO_OFFSET));
233 gdp_dbg_vps(s, readl(gdp->regs + GAM_GDP_VPS_OFFSET));
237 gdp_dbg_size(s, readl(gdp->regs + GAM_GDP_SIZE_OFFSET));
239 gdp_dbg_nvn(s, gdp, readl(gdp->regs + GAM_GDP_NVN_OFFSET));
243 gdp_dbg_ppt(s, readl(gdp->regs + GAM_GDP_PPT_OFFSET));
246 gdp_dbg_mst(s, readl(gdp->regs + GAM_GDP_MST_OFFSET));
283 struct sti_gdp *gdp = (struct sti_gdp *)node->info_ent->data;
287 seq_printf(s, "\n%s[%d].top", sti_plane_to_str(&gdp->plane), b);
288 gdp_node_dump_node(s, gdp->node_list[b].top_field);
289 seq_printf(s, "\n%s[%d].btm", sti_plane_to_str(&gdp->plane), b);
290 gdp_node_dump_node(s, gdp->node_list[b].btm_field);
316 static int gdp_debugfs_init(struct sti_gdp *gdp, struct drm_minor *minor)
322 switch (gdp->plane.desc) {
344 gdp_debugfs_files[i].data = gdp;
388 * @gdp: gdp pointer
395 static struct sti_gdp_node_list *sti_gdp_get_free_nodes(struct sti_gdp *gdp)
400 hw_nvn = readl(gdp->regs + GAM_GDP_NVN_OFFSET);
405 if ((hw_nvn != gdp->node_list[i].btm_field_paddr) &&
406 (hw_nvn != gdp->node_list[i].top_field_paddr))
407 return &gdp->node_list[i];
411 sti_plane_to_str(&gdp->plane), hw_nvn);
414 return &gdp->node_list[0];
419 * @gdp: gdp pointer
427 struct sti_gdp_node_list *sti_gdp_get_current_nodes(struct sti_gdp *gdp)
432 hw_nvn = readl(gdp->regs + GAM_GDP_NVN_OFFSET);
437 if ((hw_nvn == gdp->node_list[i].btm_field_paddr) ||
438 (hw_nvn == gdp->node_list[i].top_field_paddr))
439 return &gdp->node_list[i];
443 hw_nvn, sti_plane_to_str(&gdp->plane));
450 * @gdp: gdp pointer
454 static void sti_gdp_disable(struct sti_gdp *gdp)
458 DRM_DEBUG_DRIVER("%s\n", sti_plane_to_str(&gdp->plane));
462 gdp->node_list[i].top_field->gam_gdp_ppt |= GAM_GDP_PPT_IGNORE;
463 gdp->node_list[i].btm_field->gam_gdp_ppt |= GAM_GDP_PPT_IGNORE;
466 if (sti_vtg_unregister_client(gdp->vtg, &gdp->vtg_field_nb))
469 if (gdp->clk_pix)
470 clk_disable_unprepare(gdp->clk_pix);
472 gdp->plane.status = STI_PLANE_DISABLED;
473 gdp->vtg = NULL;
490 struct sti_gdp *gdp = container_of(nb, struct sti_gdp, vtg_field_nb);
492 if (gdp->plane.status == STI_PLANE_FLUSHING) {
495 sti_plane_to_str(&gdp->plane));
497 sti_gdp_disable(gdp);
502 gdp->is_curr_top = true;
505 gdp->is_curr_top = false;
515 static void sti_gdp_init(struct sti_gdp *gdp)
517 struct device_node *np = gdp->dev->of_node;
525 base = dma_alloc_wc(gdp->dev, size, &dma_addr, GFP_KERNEL);
538 gdp->node_list[i].top_field = base;
539 gdp->node_list[i].top_field_paddr = dma_addr;
549 gdp->node_list[i].btm_field = base;
550 gdp->node_list[i].btm_field_paddr = dma_addr;
560 switch (gdp->plane.desc) {
578 gdp->clk_pix = devm_clk_get(gdp->dev, clk_name);
579 if (IS_ERR(gdp->clk_pix))
582 gdp->clk_main_parent = devm_clk_get(gdp->dev, "main_parent");
583 if (IS_ERR(gdp->clk_main_parent))
586 gdp->clk_aux_parent = devm_clk_get(gdp->dev, "aux_parent");
587 if (IS_ERR(gdp->clk_aux_parent))
621 struct sti_gdp *gdp = to_sti_gdp(plane);
660 /* Set gdp clock */
661 if (mode->clock && gdp->clk_pix) {
667 * According to the mixer used, the gdp pixel clock
671 clkp = gdp->clk_main_parent;
673 clkp = gdp->clk_aux_parent;
676 clk_set_parent(gdp->clk_pix, clkp);
678 res = clk_set_rate(gdp->clk_pix, rate);
680 DRM_ERROR("Cannot set rate (%dHz) for gdp\n",
702 struct sti_gdp *gdp = to_sti_gdp(plane);
736 if (!gdp->vtg) {
737 struct sti_compositor *compo = dev_get_drvdata(gdp->dev);
740 /* Register gdp callback */
741 gdp->vtg = compo->vtg[mixer->id];
742 sti_vtg_register_client(gdp->vtg, &gdp->vtg_field_nb, crtc);
743 clk_prepare_enable(gdp->clk_pix);
757 list = sti_gdp_get_free_nodes(gdp);
761 dev_dbg(gdp->dev, "%s %s top_node:0x%p btm_node:0x%p\n", __func__,
785 dst_w = sti_gdp_get_dst(gdp->dev, dst_w, src_w);
786 dst_h = sti_gdp_get_dst(gdp->dev, dst_h, src_h);
818 curr_list = sti_gdp_get_current_nodes(gdp);
822 dev_dbg(gdp->dev, "Current NVN:0x%X\n",
823 readl(gdp->regs + GAM_GDP_NVN_OFFSET));
824 dev_dbg(gdp->dev, "Posted buff: %lx current buff: %x\n",
826 readl(gdp->regs + GAM_GDP_PML_OFFSET));
834 writel(gdp->is_curr_top ?
836 gdp->regs + GAM_GDP_NVN_OFFSET);
841 if (gdp->is_curr_top) {
849 gdp->regs + GAM_GDP_NVN_OFFSET);
853 writel(dma_updated_top, gdp->regs + GAM_GDP_NVN_OFFSET);
897 struct sti_gdp *gdp = to_sti_gdp(plane);
899 return gdp_debugfs_init(gdp, drm_plane->dev->primary);
918 struct sti_gdp *gdp;
921 gdp = devm_kzalloc(dev, sizeof(*gdp), GFP_KERNEL);
922 if (!gdp) {
927 gdp->dev = dev;
928 gdp->regs = baseaddr;
929 gdp->plane.desc = desc;
930 gdp->plane.status = STI_PLANE_DISABLED;
932 gdp->vtg_field_nb.notifier_call = sti_gdp_field_cb;
934 sti_gdp_init(gdp);
936 res = drm_universal_plane_init(drm_dev, &gdp->plane.drm_plane,
947 drm_plane_helper_add(&gdp->plane.drm_plane, &sti_gdp_helpers_funcs);
949 sti_plane_init_property(&gdp->plane, type);
951 return &gdp->plane.drm_plane;
954 devm_kfree(dev, gdp);