Lines Matching refs:hdmi
63 static inline u8 hdmi_readb(struct rk3066_hdmi *hdmi, u16 offset)
65 return readl_relaxed(hdmi->regs + offset);
68 static inline void hdmi_writeb(struct rk3066_hdmi *hdmi, u16 offset, u32 val)
70 writel_relaxed(val, hdmi->regs + offset);
73 static inline void hdmi_modb(struct rk3066_hdmi *hdmi, u16 offset,
76 u8 temp = hdmi_readb(hdmi, offset) & ~msk;
79 hdmi_writeb(hdmi, offset, temp);
82 static void rk3066_hdmi_i2c_init(struct rk3066_hdmi *hdmi)
86 ddc_bus_freq = (hdmi->tmdsclk >> 2) / HDMI_SCL_RATE;
88 hdmi_writeb(hdmi, HDMI_DDC_BUS_FREQ_L, ddc_bus_freq & 0xFF);
89 hdmi_writeb(hdmi, HDMI_DDC_BUS_FREQ_H, (ddc_bus_freq >> 8) & 0xFF);
92 hdmi_modb(hdmi, HDMI_INTR_MASK1, HDMI_INTR_EDID_MASK, 0);
93 hdmi_writeb(hdmi, HDMI_INTR_STATUS1, HDMI_INTR_EDID_MASK);
96 static inline u8 rk3066_hdmi_get_power_mode(struct rk3066_hdmi *hdmi)
98 return hdmi_readb(hdmi, HDMI_SYS_CTRL) & HDMI_SYS_POWER_MODE_MASK;
101 static void rk3066_hdmi_set_power_mode(struct rk3066_hdmi *hdmi, int mode)
106 current_mode = rk3066_hdmi_get_power_mode(hdmi);
108 DRM_DEV_DEBUG(hdmi->dev, "mode :%d\n", mode);
109 DRM_DEV_DEBUG(hdmi->dev, "current_mode :%d\n", current_mode);
124 DRM_DEV_DEBUG(hdmi->dev, "%d: next_mode :%d\n", i, next_mode);
127 hdmi_modb(hdmi, HDMI_SYS_CTRL,
130 hdmi_writeb(hdmi, HDMI_SYS_CTRL,
134 hdmi_writeb(hdmi, HDMI_SYS_CTRL,
138 hdmi_writeb(hdmi, HDMI_SYS_CTRL,
152 hdmi->tmdsclk = DEFAULT_PLLA_RATE;
156 rk3066_hdmi_upload_frame(struct rk3066_hdmi *hdmi, int setup_rc,
161 hdmi_modb(hdmi, HDMI_CP_AUTO_SEND_CTRL, mask, disable);
163 hdmi_writeb(hdmi, HDMI_CP_BUF_INDEX, frame_index);
175 hdmi_writeb(hdmi, HDMI_CP_BUF_ACC_HB0 + i * 4,
179 hdmi_modb(hdmi, HDMI_CP_AUTO_SEND_CTRL, mask, enable);
185 static int rk3066_hdmi_config_avi(struct rk3066_hdmi *hdmi,
192 &hdmi->connector, mode);
194 if (hdmi->hdmi_data.enc_out_format == HDMI_COLORSPACE_YUV444)
196 else if (hdmi->hdmi_data.enc_out_format == HDMI_COLORSPACE_YUV422)
201 frame.avi.colorimetry = hdmi->hdmi_data.colorimetry;
204 return rk3066_hdmi_upload_frame(hdmi, rc, &frame,
208 static int rk3066_hdmi_config_video_timing(struct rk3066_hdmi *hdmi,
222 if (hdmi->hdmi_data.vic == 2 || hdmi->hdmi_data.vic == 3)
228 hdmi_writeb(hdmi, HDMI_EXT_VIDEO_PARA, value);
232 hdmi_writeb(hdmi, HDMI_EXT_HTOTAL_L, value & 0xFF);
233 hdmi_writeb(hdmi, HDMI_EXT_HTOTAL_H, (value >> 8) & 0xFF);
236 hdmi_writeb(hdmi, HDMI_EXT_HBLANK_L, value & 0xFF);
237 hdmi_writeb(hdmi, HDMI_EXT_HBLANK_H, (value >> 8) & 0xFF);
240 hdmi_writeb(hdmi, HDMI_EXT_HDELAY_L, value & 0xFF);
241 hdmi_writeb(hdmi, HDMI_EXT_HDELAY_H, (value >> 8) & 0xFF);
244 hdmi_writeb(hdmi, HDMI_EXT_HDURATION_L, value & 0xFF);
245 hdmi_writeb(hdmi, HDMI_EXT_HDURATION_H, (value >> 8) & 0xFF);
248 hdmi_writeb(hdmi, HDMI_EXT_VTOTAL_L, value & 0xFF);
249 hdmi_writeb(hdmi, HDMI_EXT_VTOTAL_H, (value >> 8) & 0xFF);
252 hdmi_writeb(hdmi, HDMI_EXT_VBLANK_L, value & 0xFF);
255 hdmi_writeb(hdmi, HDMI_EXT_VDELAY, value & 0xFF);
258 hdmi_writeb(hdmi, HDMI_EXT_VDURATION, value & 0xFF);
264 rk3066_hdmi_phy_write(struct rk3066_hdmi *hdmi, u16 offset, u8 value)
266 hdmi_writeb(hdmi, offset, value);
267 hdmi_modb(hdmi, HDMI_SYS_CTRL,
270 hdmi_modb(hdmi, HDMI_SYS_CTRL, HDMI_SYS_PLL_RESET_MASK, 0);
274 static void rk3066_hdmi_config_phy(struct rk3066_hdmi *hdmi)
277 hdmi_writeb(hdmi, HDMI_DEEP_COLOR_MODE, 0x22);
280 * The semi-public documentation does not describe the hdmi registers
284 if (hdmi->tmdsclk > 100000000) {
285 rk3066_hdmi_phy_write(hdmi, 0x158, 0x0E);
286 rk3066_hdmi_phy_write(hdmi, 0x15c, 0x00);
287 rk3066_hdmi_phy_write(hdmi, 0x160, 0x60);
288 rk3066_hdmi_phy_write(hdmi, 0x164, 0x00);
289 rk3066_hdmi_phy_write(hdmi, 0x168, 0xDA);
290 rk3066_hdmi_phy_write(hdmi, 0x16c, 0xA1);
291 rk3066_hdmi_phy_write(hdmi, 0x170, 0x0e);
292 rk3066_hdmi_phy_write(hdmi, 0x174, 0x22);
293 rk3066_hdmi_phy_write(hdmi, 0x178, 0x00);
294 } else if (hdmi->tmdsclk > 50000000) {
295 rk3066_hdmi_phy_write(hdmi, 0x158, 0x06);
296 rk3066_hdmi_phy_write(hdmi, 0x15c, 0x00);
297 rk3066_hdmi_phy_write(hdmi, 0x160, 0x60);
298 rk3066_hdmi_phy_write(hdmi, 0x164, 0x00);
299 rk3066_hdmi_phy_write(hdmi, 0x168, 0xCA);
300 rk3066_hdmi_phy_write(hdmi, 0x16c, 0xA3);
301 rk3066_hdmi_phy_write(hdmi, 0x170, 0x0e);
302 rk3066_hdmi_phy_write(hdmi, 0x174, 0x20);
303 rk3066_hdmi_phy_write(hdmi, 0x178, 0x00);
305 rk3066_hdmi_phy_write(hdmi, 0x158, 0x02);
306 rk3066_hdmi_phy_write(hdmi, 0x15c, 0x00);
307 rk3066_hdmi_phy_write(hdmi, 0x160, 0x60);
308 rk3066_hdmi_phy_write(hdmi, 0x164, 0x00);
309 rk3066_hdmi_phy_write(hdmi, 0x168, 0xC2);
310 rk3066_hdmi_phy_write(hdmi, 0x16c, 0xA2);
311 rk3066_hdmi_phy_write(hdmi, 0x170, 0x0e);
312 rk3066_hdmi_phy_write(hdmi, 0x174, 0x20);
313 rk3066_hdmi_phy_write(hdmi, 0x178, 0x00);
317 static int rk3066_hdmi_setup(struct rk3066_hdmi *hdmi,
320 hdmi->hdmi_data.vic = drm_match_cea_mode(mode);
321 hdmi->hdmi_data.enc_out_format = HDMI_COLORSPACE_RGB;
323 if (hdmi->hdmi_data.vic == 6 || hdmi->hdmi_data.vic == 7 ||
324 hdmi->hdmi_data.vic == 21 || hdmi->hdmi_data.vic == 22 ||
325 hdmi->hdmi_data.vic == 2 || hdmi->hdmi_data.vic == 3 ||
326 hdmi->hdmi_data.vic == 17 || hdmi->hdmi_data.vic == 18)
327 hdmi->hdmi_data.colorimetry = HDMI_COLORIMETRY_ITU_601;
329 hdmi->hdmi_data.colorimetry = HDMI_COLORIMETRY_ITU_709;
331 hdmi->tmdsclk = mode->clock * 1000;
334 hdmi_modb(hdmi, HDMI_VIDEO_CTRL2, HDMI_VIDEO_AUDIO_DISABLE_MASK,
338 if (rk3066_hdmi_get_power_mode(hdmi) != HDMI_SYS_POWER_MODE_B)
339 rk3066_hdmi_set_power_mode(hdmi, HDMI_SYS_POWER_MODE_B);
342 hdmi_modb(hdmi, HDMI_AV_CTRL1,
344 hdmi_writeb(hdmi, HDMI_VIDEO_CTRL1,
348 hdmi_writeb(hdmi, HDMI_DEEP_COLOR_MODE, 0x20);
350 rk3066_hdmi_config_video_timing(hdmi, mode);
352 if (hdmi->hdmi_data.sink_is_hdmi) {
353 hdmi_modb(hdmi, HDMI_HDCP_CTRL, HDMI_VIDEO_MODE_MASK,
355 rk3066_hdmi_config_avi(hdmi, mode);
357 hdmi_modb(hdmi, HDMI_HDCP_CTRL, HDMI_VIDEO_MODE_MASK, 0);
360 rk3066_hdmi_config_phy(hdmi);
362 rk3066_hdmi_set_power_mode(hdmi, HDMI_SYS_POWER_MODE_E);
370 rk3066_hdmi_i2c_init(hdmi);
373 hdmi_modb(hdmi, HDMI_VIDEO_CTRL2,
383 struct rk3066_hdmi *hdmi = to_rk3066_hdmi(encoder);
386 drm_mode_copy(&hdmi->previous_mode, adj_mode);
391 struct rk3066_hdmi *hdmi = to_rk3066_hdmi(encoder);
394 mux = drm_of_encoder_active_endpoint_id(hdmi->dev->of_node, encoder);
400 regmap_write(hdmi->grf_regmap, GRF_SOC_CON0, val);
402 DRM_DEV_DEBUG(hdmi->dev, "hdmi encoder enable select: vop%s\n",
405 rk3066_hdmi_setup(hdmi, &hdmi->previous_mode);
410 struct rk3066_hdmi *hdmi = to_rk3066_hdmi(encoder);
412 DRM_DEV_DEBUG(hdmi->dev, "hdmi encoder disable\n");
414 if (rk3066_hdmi_get_power_mode(hdmi) == HDMI_SYS_POWER_MODE_E) {
415 hdmi_writeb(hdmi, HDMI_VIDEO_CTRL2,
417 hdmi_modb(hdmi, HDMI_VIDEO_CTRL2,
422 rk3066_hdmi_set_power_mode(hdmi, HDMI_SYS_POWER_MODE_A);
458 struct rk3066_hdmi *hdmi = to_rk3066_hdmi(connector);
460 return (hdmi_readb(hdmi, HDMI_HPG_MENS_STA) & HDMI_HPG_IN_STATUS_HIGH) ?
466 struct rk3066_hdmi *hdmi = to_rk3066_hdmi(connector);
470 if (!hdmi->ddc)
473 edid = drm_get_edid(connector, hdmi->ddc);
475 hdmi->hdmi_data.sink_is_hdmi = drm_detect_hdmi_monitor(edid);
499 struct rk3066_hdmi *hdmi = to_rk3066_hdmi(connector);
501 return &hdmi->encoder;
539 rk3066_hdmi_register(struct drm_device *drm, struct rk3066_hdmi *hdmi)
541 struct drm_encoder *encoder = &hdmi->encoder;
542 struct device *dev = hdmi->dev;
559 hdmi->connector.polled = DRM_CONNECTOR_POLL_HPD;
561 drm_connector_helper_add(&hdmi->connector,
563 drm_connector_init_with_ddc(drm, &hdmi->connector,
566 hdmi->ddc);
568 drm_connector_attach_encoder(&hdmi->connector, encoder);
575 struct rk3066_hdmi *hdmi = dev_id;
579 if (rk3066_hdmi_get_power_mode(hdmi) == HDMI_SYS_POWER_MODE_A)
580 hdmi_writeb(hdmi, HDMI_SYS_CTRL, HDMI_SYS_POWER_MODE_B);
582 interrupt = hdmi_readb(hdmi, HDMI_INTR_STATUS1);
584 hdmi_writeb(hdmi, HDMI_INTR_STATUS1, interrupt);
587 hdmi->i2c->stat = interrupt;
588 complete(&hdmi->i2c->cmpltn);
599 struct rk3066_hdmi *hdmi = dev_id;
601 drm_helper_hpd_irq_event(hdmi->connector.dev);
606 static int rk3066_hdmi_i2c_read(struct rk3066_hdmi *hdmi, struct i2c_msg *msgs)
612 ret = wait_for_completion_timeout(&hdmi->i2c->cmpltn, HZ / 10);
613 if (!ret || hdmi->i2c->stat & HDMI_INTR_EDID_ERR)
617 *buf++ = hdmi_readb(hdmi, HDMI_DDC_READ_FIFO_ADDR);
622 static int rk3066_hdmi_i2c_write(struct rk3066_hdmi *hdmi, struct i2c_msg *msgs)
633 reinit_completion(&hdmi->i2c->cmpltn);
636 hdmi->i2c->segment_addr = msgs->buf[0];
638 hdmi->i2c->ddc_addr = msgs->buf[0];
641 hdmi_writeb(hdmi, HDMI_EDID_FIFO_ADDR, 0x00);
644 hdmi_writeb(hdmi, HDMI_EDID_WORD_ADDR, hdmi->i2c->ddc_addr);
647 hdmi_writeb(hdmi, HDMI_EDID_SEGMENT_POINTER, hdmi->i2c->segment_addr);
655 struct rk3066_hdmi *hdmi = i2c_get_adapdata(adap);
656 struct rk3066_hdmi_i2c *i2c = hdmi->i2c;
661 rk3066_hdmi_i2c_init(hdmi);
664 hdmi_modb(hdmi, HDMI_INTR_MASK1,
669 DRM_DEV_DEBUG(hdmi->dev,
674 ret = rk3066_hdmi_i2c_read(hdmi, &msgs[i]);
676 ret = rk3066_hdmi_i2c_write(hdmi, &msgs[i]);
686 hdmi_modb(hdmi, HDMI_INTR_MASK1, HDMI_INTR_EDID_MASK, 0);
703 static struct i2c_adapter *rk3066_hdmi_i2c_adapter(struct rk3066_hdmi *hdmi)
709 i2c = devm_kzalloc(hdmi->dev, sizeof(*i2c), GFP_KERNEL);
719 adap->dev.parent = hdmi->dev;
720 adap->dev.of_node = hdmi->dev->of_node;
723 i2c_set_adapdata(adap, hdmi);
727 DRM_DEV_ERROR(hdmi->dev, "cannot add %s I2C adapter\n",
729 devm_kfree(hdmi->dev, i2c);
733 hdmi->i2c = i2c;
735 DRM_DEV_DEBUG(hdmi->dev, "registered %s I2C bus driver\n", adap->name);
745 struct rk3066_hdmi *hdmi;
749 hdmi = devm_kzalloc(dev, sizeof(*hdmi), GFP_KERNEL);
750 if (!hdmi)
753 hdmi->dev = dev;
754 hdmi->drm_dev = drm;
755 hdmi->regs = devm_platform_ioremap_resource(pdev, 0);
756 if (IS_ERR(hdmi->regs))
757 return PTR_ERR(hdmi->regs);
763 hdmi->hclk = devm_clk_get(dev, "hclk");
764 if (IS_ERR(hdmi->hclk)) {
766 return PTR_ERR(hdmi->hclk);
769 ret = clk_prepare_enable(hdmi->hclk);
775 hdmi->grf_regmap = syscon_regmap_lookup_by_phandle(dev->of_node,
777 if (IS_ERR(hdmi->grf_regmap)) {
779 ret = PTR_ERR(hdmi->grf_regmap);
784 hdmi_writeb(hdmi, HDMI_INTERNAL_CLK_DIVIDER, 25);
786 hdmi->ddc = rk3066_hdmi_i2c_adapter(hdmi);
787 if (IS_ERR(hdmi->ddc)) {
788 ret = PTR_ERR(hdmi->ddc);
789 hdmi->ddc = NULL;
793 rk3066_hdmi_set_power_mode(hdmi, HDMI_SYS_POWER_MODE_B);
795 hdmi_writeb(hdmi, HDMI_INTR_MASK1, HDMI_INTR_HOTPLUG);
796 hdmi_writeb(hdmi, HDMI_INTR_MASK2, 0);
797 hdmi_writeb(hdmi, HDMI_INTR_MASK3, 0);
798 hdmi_writeb(hdmi, HDMI_INTR_MASK4, 0);
799 rk3066_hdmi_set_power_mode(hdmi, HDMI_SYS_POWER_MODE_A);
801 ret = rk3066_hdmi_register(drm, hdmi);
805 dev_set_drvdata(dev, hdmi);
809 dev_name(dev), hdmi);
811 DRM_DEV_ERROR(dev, "failed to request hdmi irq: %d\n", ret);
818 hdmi->connector.funcs->destroy(&hdmi->connector);
819 hdmi->encoder.funcs->destroy(&hdmi->encoder);
821 i2c_put_adapter(hdmi->ddc);
823 clk_disable_unprepare(hdmi->hclk);
831 struct rk3066_hdmi *hdmi = dev_get_drvdata(dev);
833 hdmi->connector.funcs->destroy(&hdmi->connector);
834 hdmi->encoder.funcs->destroy(&hdmi->encoder);
836 i2c_put_adapter(hdmi->ddc);
837 clk_disable_unprepare(hdmi->hclk);
858 { .compatible = "rockchip,rk3066-hdmi" },
867 .name = "rockchip-rk3066-hdmi",