Lines Matching refs:ret
88 int ret;
90 ret = clk_prepare_enable(dp->pclk);
91 if (ret < 0) {
92 DRM_DEV_ERROR(dp->dev, "failed to enable pclk %d\n", ret);
93 return ret;
96 ret = rockchip_dp_pre_init(dp);
97 if (ret < 0) {
98 DRM_DEV_ERROR(dp->dev, "failed to dp pre init %d\n", ret);
100 return ret;
103 return ret;
172 int ret;
184 ret = drm_of_encoder_active_endpoint_id(dp->dev->of_node, encoder);
185 if (ret < 0)
188 if (ret)
193 DRM_DEV_DEBUG(dp->dev, "vop %s output to dp\n", (ret) ? "LIT" : "BIG");
195 ret = clk_prepare_enable(dp->grfclk);
196 if (ret < 0) {
197 DRM_DEV_ERROR(dp->dev, "failed to enable grfclk %d\n", ret);
201 ret = regmap_write(dp->grf, dp->data->lcdsel_grf_reg, val);
202 if (ret != 0)
203 DRM_DEV_ERROR(dp->dev, "Could not write to GRF: %d\n", ret);
214 int ret;
226 ret = rockchip_drm_wait_vact_end(crtc, PSR_WAIT_LINE_FLAG_TIMEOUT_MS);
227 if (ret)
303 int ret;
309 ret = drm_simple_encoder_init(drm_dev, encoder,
311 if (ret) {
313 return ret;
326 int ret;
330 ret = rockchip_dp_drm_create_encoder(dp);
331 if (ret) {
333 return ret;
338 ret = analogix_dp_bind(dp->adp, drm_dev);
339 if (ret)
345 return ret;
368 int ret;
374 ret = drm_of_find_panel_or_bridge(dev->of_node, 1, 0, &panel, NULL);
375 if (ret < 0)
376 return ret;
391 ret = rockchip_dp_of_probe(dp);
392 if (ret < 0)
393 return ret;
401 ret = component_add(dev, &rockchip_dp_component_ops);
402 if (ret)
409 return ret;