Lines Matching defs:rdev
340 extern void vce_v1_0_enable_mgcg(struct radeon_device *rdev, bool enable);
341 static void trinity_program_clk_gating_hw_sequence(struct radeon_device *rdev,
343 static void trinity_override_dynamic_mg_powergating(struct radeon_device *rdev);
344 static void trinity_apply_state_adjust_rules(struct radeon_device *rdev,
355 static struct trinity_power_info *trinity_get_pi(struct radeon_device *rdev)
357 struct trinity_power_info *pi = rdev->pm.dpm.priv;
362 static void trinity_gfx_powergating_initialize(struct radeon_device *rdev)
364 struct trinity_power_info *pi = trinity_get_pi(rdev);
368 u32 xclk = radeon_get_xclk(rdev);
373 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM,
393 trinity_override_dynamic_mg_powergating(rdev);
402 static void trinity_mg_clockgating_enable(struct radeon_device *rdev,
431 static void trinity_mg_clockgating_initialize(struct radeon_device *rdev)
439 trinity_program_clk_gating_hw_sequence(rdev, seq, count);
442 static void trinity_gfx_clockgating_enable(struct radeon_device *rdev,
455 static void trinity_program_clk_gating_hw_sequence(struct radeon_device *rdev,
464 static void trinity_program_override_mgpg_sequences(struct radeon_device *rdev,
474 static void trinity_override_dynamic_mg_powergating(struct radeon_device *rdev)
482 trinity_program_override_mgpg_sequences(rdev, seq, count);
485 static void trinity_ls_clockgating_enable(struct radeon_device *rdev,
499 trinity_program_clk_gating_hw_sequence(rdev, seq, count);
502 static void trinity_gfx_powergating_enable(struct radeon_device *rdev,
516 static void trinity_gfx_dynamic_mgpg_enable(struct radeon_device *rdev,
541 trinity_gfx_dynamic_mgpg_config(rdev);
545 static void trinity_enable_clock_power_gating(struct radeon_device *rdev)
547 struct trinity_power_info *pi = trinity_get_pi(rdev);
550 sumo_gfx_clockgating_initialize(rdev);
552 trinity_mg_clockgating_initialize(rdev);
554 trinity_gfx_powergating_initialize(rdev);
556 trinity_ls_clockgating_enable(rdev, true);
557 trinity_mg_clockgating_enable(rdev, true);
560 trinity_gfx_clockgating_enable(rdev, true);
562 trinity_gfx_dynamic_mgpg_enable(rdev, true);
564 trinity_gfx_powergating_enable(rdev, true);
567 static void trinity_disable_clock_power_gating(struct radeon_device *rdev)
569 struct trinity_power_info *pi = trinity_get_pi(rdev);
572 trinity_gfx_powergating_enable(rdev, false);
574 trinity_gfx_dynamic_mgpg_enable(rdev, false);
576 trinity_gfx_clockgating_enable(rdev, false);
578 trinity_mg_clockgating_enable(rdev, false);
579 trinity_ls_clockgating_enable(rdev, false);
583 static void trinity_set_divider_value(struct radeon_device *rdev,
591 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM,
601 ret = radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM,
612 static void trinity_set_ds_dividers(struct radeon_device *rdev,
624 static void trinity_set_ss_dividers(struct radeon_device *rdev,
636 static void trinity_set_vid(struct radeon_device *rdev, u32 index, u32 vid)
638 struct trinity_power_info *pi = trinity_get_pi(rdev);
639 u32 vid_7bit = sumo_convert_vid2_to_vid7(rdev, &pi->sys_info.vid_mapping_table, vid);
654 static void trinity_set_allos_gnb_slow(struct radeon_device *rdev,
666 static void trinity_set_force_nbp_state(struct radeon_device *rdev,
678 static void trinity_set_display_wm(struct radeon_device *rdev,
690 static void trinity_set_vce_wm(struct radeon_device *rdev,
702 static void trinity_set_at(struct radeon_device *rdev,
714 static void trinity_program_power_level(struct radeon_device *rdev,
717 struct trinity_power_info *pi = trinity_get_pi(rdev);
722 trinity_set_divider_value(rdev, index, pl->sclk);
723 trinity_set_vid(rdev, index, pl->vddc_index);
724 trinity_set_ss_dividers(rdev, index, pl->ss_divider_index);
725 trinity_set_ds_dividers(rdev, index, pl->ds_divider_index);
726 trinity_set_allos_gnb_slow(rdev, index, pl->allow_gnb_slow);
727 trinity_set_force_nbp_state(rdev, index, pl->force_nbp_state);
728 trinity_set_display_wm(rdev, index, pl->display_wm);
729 trinity_set_vce_wm(rdev, index, pl->vce_wm);
730 trinity_set_at(rdev, index, pi->at[index]);
733 static void trinity_power_level_enable_disable(struct radeon_device *rdev,
746 static bool trinity_dpm_enabled(struct radeon_device *rdev)
754 static void trinity_start_dpm(struct radeon_device *rdev)
765 trinity_dpm_config(rdev, true);
768 static void trinity_wait_for_dpm_enabled(struct radeon_device *rdev)
772 for (i = 0; i < rdev->usec_timeout; i++) {
777 for (i = 0; i < rdev->usec_timeout; i++) {
782 for (i = 0; i < rdev->usec_timeout; i++) {
789 static void trinity_stop_dpm(struct radeon_device *rdev)
799 trinity_dpm_config(rdev, false);
802 static void trinity_start_am(struct radeon_device *rdev)
807 static void trinity_reset_am(struct radeon_device *rdev)
813 static void trinity_wait_for_level_0(struct radeon_device *rdev)
817 for (i = 0; i < rdev->usec_timeout; i++) {
824 static void trinity_enable_power_level_0(struct radeon_device *rdev)
826 trinity_power_level_enable_disable(rdev, 0, true);
829 static void trinity_force_level_0(struct radeon_device *rdev)
831 trinity_dpm_force_state(rdev, 0);
834 static void trinity_unforce_levels(struct radeon_device *rdev)
836 trinity_dpm_no_forced_level(rdev);
839 static void trinity_program_power_levels_0_to_n(struct radeon_device *rdev,
849 trinity_program_power_level(rdev, &new_ps->levels[i], i);
850 trinity_power_level_enable_disable(rdev, i, true);
854 trinity_power_level_enable_disable(rdev, i, false);
857 static void trinity_program_bootup_state(struct radeon_device *rdev)
859 struct trinity_power_info *pi = trinity_get_pi(rdev);
862 trinity_program_power_level(rdev, &pi->boot_pl, 0);
863 trinity_power_level_enable_disable(rdev, 0, true);
866 trinity_power_level_enable_disable(rdev, i, false);
869 static void trinity_setup_uvd_clock_table(struct radeon_device *rdev,
881 static void trinity_setup_uvd_dpm_interval(struct radeon_device *rdev,
887 u32 xclk = radeon_get_xclk(rdev);
921 static void trinity_setup_uvd_clocks(struct radeon_device *rdev,
925 struct trinity_power_info *pi = trinity_get_pi(rdev);
928 trinity_gfx_powergating_enable(rdev, false);
934 trinity_setup_uvd_dpm_interval(rdev, 0);
936 trinity_setup_uvd_clock_table(rdev, new_rps);
943 radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk);
945 trinity_setup_uvd_dpm_interval(rdev, 3000);
948 trinity_uvd_dpm_config(rdev);
954 radeon_set_uvd_clocks(rdev, new_rps->vclk, new_rps->dclk);
958 trinity_gfx_powergating_enable(rdev, true);
962 static void trinity_set_uvd_clock_before_set_eng_clock(struct radeon_device *rdev,
973 trinity_setup_uvd_clocks(rdev, new_rps, old_rps);
976 static void trinity_set_uvd_clock_after_set_eng_clock(struct radeon_device *rdev,
987 trinity_setup_uvd_clocks(rdev, new_rps, old_rps);
990 static void trinity_set_vce_clock(struct radeon_device *rdev,
998 vce_v1_0_enable_mgcg(rdev, false);
1000 vce_v1_0_enable_mgcg(rdev, true);
1001 radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk);
1005 static void trinity_program_ttt(struct radeon_device *rdev)
1007 struct trinity_power_info *pi = trinity_get_pi(rdev);
1016 static void trinity_enable_att(struct radeon_device *rdev)
1025 static void trinity_program_sclk_dpm(struct radeon_device *rdev)
1030 u32 xclk = radeon_get_xclk(rdev);
1043 static int trinity_set_thermal_temperature_range(struct radeon_device *rdev,
1061 rdev->pm.dpm.thermal.min_temp = low_temp;
1062 rdev->pm.dpm.thermal.max_temp = high_temp;
1067 static void trinity_update_current_ps(struct radeon_device *rdev,
1071 struct trinity_power_info *pi = trinity_get_pi(rdev);
1078 static void trinity_update_requested_ps(struct radeon_device *rdev,
1082 struct trinity_power_info *pi = trinity_get_pi(rdev);
1089 void trinity_dpm_enable_bapm(struct radeon_device *rdev, bool enable)
1091 struct trinity_power_info *pi = trinity_get_pi(rdev);
1094 trinity_acquire_mutex(rdev);
1095 trinity_dpm_bapm_enable(rdev, enable);
1096 trinity_release_mutex(rdev);
1100 int trinity_dpm_enable(struct radeon_device *rdev)
1102 struct trinity_power_info *pi = trinity_get_pi(rdev);
1104 trinity_acquire_mutex(rdev);
1106 if (trinity_dpm_enabled(rdev)) {
1107 trinity_release_mutex(rdev);
1111 trinity_program_bootup_state(rdev);
1112 sumo_program_vc(rdev, 0x00C00033);
1113 trinity_start_am(rdev);
1115 trinity_program_ttt(rdev);
1116 trinity_enable_att(rdev);
1118 trinity_program_sclk_dpm(rdev);
1119 trinity_start_dpm(rdev);
1120 trinity_wait_for_dpm_enabled(rdev);
1121 trinity_dpm_bapm_enable(rdev, false);
1122 trinity_release_mutex(rdev);
1124 trinity_update_current_ps(rdev, rdev->pm.dpm.boot_ps);
1129 int trinity_dpm_late_enable(struct radeon_device *rdev)
1133 trinity_acquire_mutex(rdev);
1134 trinity_enable_clock_power_gating(rdev);
1136 if (rdev->irq.installed &&
1137 r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) {
1138 ret = trinity_set_thermal_temperature_range(rdev, R600_TEMP_RANGE_MIN, R600_TEMP_RANGE_MAX);
1140 trinity_release_mutex(rdev);
1143 rdev->irq.dpm_thermal = true;
1144 radeon_irq_set(rdev);
1146 trinity_release_mutex(rdev);
1151 void trinity_dpm_disable(struct radeon_device *rdev)
1153 trinity_acquire_mutex(rdev);
1154 if (!trinity_dpm_enabled(rdev)) {
1155 trinity_release_mutex(rdev);
1158 trinity_dpm_bapm_enable(rdev, false);
1159 trinity_disable_clock_power_gating(rdev);
1160 sumo_clear_vc(rdev);
1161 trinity_wait_for_level_0(rdev);
1162 trinity_stop_dpm(rdev);
1163 trinity_reset_am(rdev);
1164 trinity_release_mutex(rdev);
1166 if (rdev->irq.installed &&
1167 r600_is_internal_thermal_sensor(rdev->pm.int_thermal_type)) {
1168 rdev->irq.dpm_thermal = false;
1169 radeon_irq_set(rdev);
1172 trinity_update_current_ps(rdev, rdev->pm.dpm.boot_ps);
1175 static void trinity_get_min_sclk_divider(struct radeon_device *rdev)
1177 struct trinity_power_info *pi = trinity_get_pi(rdev);
1183 static void trinity_setup_nbp_sim(struct radeon_device *rdev,
1186 struct trinity_power_info *pi = trinity_get_pi(rdev);
1201 int trinity_dpm_force_performance_level(struct radeon_device *rdev,
1204 struct trinity_power_info *pi = trinity_get_pi(rdev);
1216 ret = trinity_dpm_n_levels_disabled(rdev, ps->num_levels - 1);
1221 ret = trinity_dpm_n_levels_disabled(rdev, 0);
1227 rdev->pm.dpm.forced_level = level;
1232 int trinity_dpm_pre_set_power_state(struct radeon_device *rdev)
1234 struct trinity_power_info *pi = trinity_get_pi(rdev);
1235 struct radeon_ps requested_ps = *rdev->pm.dpm.requested_ps;
1238 trinity_update_requested_ps(rdev, new_ps);
1240 trinity_apply_state_adjust_rules(rdev,
1247 int trinity_dpm_set_power_state(struct radeon_device *rdev)
1249 struct trinity_power_info *pi = trinity_get_pi(rdev);
1253 trinity_acquire_mutex(rdev);
1256 trinity_dpm_bapm_enable(rdev, rdev->pm.dpm.ac_power);
1257 trinity_set_uvd_clock_before_set_eng_clock(rdev, new_ps, old_ps);
1258 trinity_enable_power_level_0(rdev);
1259 trinity_force_level_0(rdev);
1260 trinity_wait_for_level_0(rdev);
1261 trinity_setup_nbp_sim(rdev, new_ps);
1262 trinity_program_power_levels_0_to_n(rdev, new_ps, old_ps);
1263 trinity_force_level_0(rdev);
1264 trinity_unforce_levels(rdev);
1265 trinity_set_uvd_clock_after_set_eng_clock(rdev, new_ps, old_ps);
1266 trinity_set_vce_clock(rdev, new_ps, old_ps);
1268 trinity_release_mutex(rdev);
1273 void trinity_dpm_post_set_power_state(struct radeon_device *rdev)
1275 struct trinity_power_info *pi = trinity_get_pi(rdev);
1278 trinity_update_current_ps(rdev, new_ps);
1281 void trinity_dpm_setup_asic(struct radeon_device *rdev)
1283 trinity_acquire_mutex(rdev);
1284 sumo_program_sstp(rdev);
1285 sumo_take_smu_control(rdev, true);
1286 trinity_get_min_sclk_divider(rdev);
1287 trinity_release_mutex(rdev);
1291 void trinity_dpm_reset_asic(struct radeon_device *rdev)
1293 struct trinity_power_info *pi = trinity_get_pi(rdev);
1295 trinity_acquire_mutex(rdev);
1297 trinity_enable_power_level_0(rdev);
1298 trinity_force_level_0(rdev);
1299 trinity_wait_for_level_0(rdev);
1300 trinity_program_bootup_state(rdev);
1301 trinity_force_level_0(rdev);
1302 trinity_unforce_levels(rdev);
1304 trinity_release_mutex(rdev);
1308 static u16 trinity_convert_voltage_index_to_value(struct radeon_device *rdev,
1311 struct trinity_power_info *pi = trinity_get_pi(rdev);
1312 u32 vid_7bit = sumo_convert_vid2_to_vid7(rdev, &pi->sys_info.vid_mapping_table, vid_2bit);
1323 static void trinity_patch_boot_state(struct radeon_device *rdev,
1326 struct trinity_power_info *pi = trinity_get_pi(rdev);
1334 static u8 trinity_calculate_vce_wm(struct radeon_device *rdev, u32 sclk)
1341 static void trinity_construct_boot_state(struct radeon_device *rdev)
1343 struct trinity_power_info *pi = trinity_get_pi(rdev);
1357 static u8 trinity_get_sleep_divider_id_from_clock(struct radeon_device *rdev,
1360 struct trinity_power_info *pi = trinity_get_pi(rdev);
1381 static u32 trinity_get_valid_engine_clock(struct radeon_device *rdev,
1384 struct trinity_power_info *pi = trinity_get_pi(rdev);
1398 static void trinity_patch_thermal_state(struct radeon_device *rdev,
1402 struct trinity_power_info *pi = trinity_get_pi(rdev);
1422 trinity_get_sleep_divider_id_from_clock(rdev, ps->levels[0].sclk, sclk_in_sr);
1428 trinity_calculate_vce_wm(rdev, ps->levels[0].sclk);
1431 static u8 trinity_calculate_display_wm(struct radeon_device *rdev,
1451 static u32 trinity_get_uvd_clock_index(struct radeon_device *rdev,
1454 struct trinity_power_info *pi = trinity_get_pi(rdev);
1470 static void trinity_adjust_uvd_state(struct radeon_device *rdev,
1474 struct trinity_power_info *pi = trinity_get_pi(rdev);
1479 high_index = trinity_get_uvd_clock_index(rdev, rps);
1504 static int trinity_get_vce_clock_voltage(struct radeon_device *rdev,
1510 &rdev->pm.dpm.dyn_state.vce_clock_voltage_dependency_table;
1534 static void trinity_apply_state_adjust_rules(struct radeon_device *rdev,
1540 struct trinity_power_info *pi = trinity_get_pi(rdev);
1547 u32 num_active_displays = rdev->pm.dpm.new_active_crtc_count;
1550 return trinity_patch_thermal_state(rdev, ps, current_ps);
1552 trinity_adjust_uvd_state(rdev, new_rps);
1555 new_rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk;
1556 new_rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk;
1568 trinity_get_valid_engine_clock(rdev, min_sclk);
1573 if (ps->levels[i].sclk < rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk)
1574 ps->levels[i].sclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].sclk;
1576 trinity_get_vce_clock_voltage(rdev, new_rps->evclk, new_rps->ecclk, &min_vce_voltage);
1582 sumo_get_sleep_divider_id_from_clock(rdev, ps->levels[i].sclk, sclk_in_sr);
1589 trinity_calculate_display_wm(rdev, ps, i);
1591 trinity_calculate_vce_wm(rdev, ps->levels[0].sclk);
1619 static void trinity_cleanup_asic(struct radeon_device *rdev)
1621 sumo_take_smu_control(rdev, false);
1625 static void trinity_pre_display_configuration_change(struct radeon_device *rdev)
1627 struct trinity_power_info *pi = trinity_get_pi(rdev);
1630 trinity_dce_enable_voltage_adjustment(rdev, false);
1634 static void trinity_add_dccac_value(struct radeon_device *rdev)
1637 u32 num_active_displays = rdev->pm.dpm.new_active_crtc_count;
1638 u64 disp_clk = rdev->clock.default_dispclk / 100;
1650 void trinity_dpm_display_configuration_changed(struct radeon_device *rdev)
1652 struct trinity_power_info *pi = trinity_get_pi(rdev);
1655 trinity_dce_enable_voltage_adjustment(rdev, true);
1656 trinity_add_dccac_value(rdev);
1680 static void trinity_parse_pplib_non_clock_info(struct radeon_device *rdev,
1700 rdev->pm.dpm.boot_ps = rps;
1701 trinity_patch_boot_state(rdev, ps);
1704 rdev->pm.dpm.uvd_ps = rps;
1707 static void trinity_parse_pplib_clock_info(struct radeon_device *rdev,
1711 struct trinity_power_info *pi = trinity_get_pi(rdev);
1729 static int trinity_parse_power_table(struct radeon_device *rdev)
1731 struct radeon_mode_info *mode_info = &rdev->mode_info;
1761 rdev->pm.dpm.ps = kcalloc(state_array->ucNumEntries,
1764 if (!rdev->pm.dpm.ps)
1773 if (!rdev->pm.power_state[i].clock_info) {
1774 kfree(rdev->pm.dpm.ps);
1779 kfree(rdev->pm.dpm.ps);
1782 rdev->pm.dpm.ps[i].ps_priv = ps;
1794 trinity_parse_pplib_clock_info(rdev,
1795 &rdev->pm.dpm.ps[i], k,
1799 trinity_parse_pplib_non_clock_info(rdev, &rdev->pm.dpm.ps[i],
1804 rdev->pm.dpm.num_ps = state_array->ucNumEntries;
1809 clock_array_index = rdev->pm.dpm.vce_states[i].clk_idx;
1814 rdev->pm.dpm.vce_states[i].sclk = sclk;
1815 rdev->pm.dpm.vce_states[i].mclk = 0;
1829 static u32 trinity_convert_did_to_freq(struct radeon_device *rdev, u8 did)
1831 struct trinity_power_info *pi = trinity_get_pi(rdev);
1848 static int trinity_parse_sys_info_table(struct radeon_device *rdev)
1850 struct trinity_power_info *pi = trinity_get_pi(rdev);
1851 struct radeon_mode_info *mode_info = &rdev->mode_info;
1910 sumo_construct_sclk_voltage_mapping_table(rdev,
1913 sumo_construct_vid_mapping_table(rdev, &pi->sys_info.vid_mapping_table,
1936 trinity_convert_did_to_freq(rdev,
1939 trinity_convert_did_to_freq(rdev,
1949 int trinity_dpm_init(struct radeon_device *rdev)
1957 rdev->pm.dpm.priv = pi;
1969 if (rdev->pdev->subsystem_vendor == 0x1462)
1989 ret = trinity_parse_sys_info_table(rdev);
1993 trinity_construct_boot_state(rdev);
1995 ret = r600_get_platform_caps(rdev);
1999 ret = r600_parse_extended_power_table(rdev);
2003 ret = trinity_parse_power_table(rdev);
2013 void trinity_dpm_print_power_state(struct radeon_device *rdev,
2026 trinity_convert_voltage_index_to_value(rdev, pl->vddc_index));
2028 r600_dpm_print_ps_status(rdev, rps);
2031 void trinity_dpm_debugfs_print_current_performance_level(struct radeon_device *rdev,
2034 struct trinity_power_info *pi = trinity_get_pi(rdev);
2049 trinity_convert_voltage_index_to_value(rdev, pl->vddc_index));
2053 u32 trinity_dpm_get_current_sclk(struct radeon_device *rdev)
2055 struct trinity_power_info *pi = trinity_get_pi(rdev);
2071 u32 trinity_dpm_get_current_mclk(struct radeon_device *rdev)
2073 struct trinity_power_info *pi = trinity_get_pi(rdev);
2078 void trinity_dpm_fini(struct radeon_device *rdev)
2082 trinity_cleanup_asic(rdev); /* ??? */
2084 for (i = 0; i < rdev->pm.dpm.num_ps; i++) {
2085 kfree(rdev->pm.dpm.ps[i].ps_priv);
2087 kfree(rdev->pm.dpm.ps);
2088 kfree(rdev->pm.dpm.priv);
2089 r600_free_extended_power_table(rdev);
2092 u32 trinity_dpm_get_sclk(struct radeon_device *rdev, bool low)
2094 struct trinity_power_info *pi = trinity_get_pi(rdev);
2103 u32 trinity_dpm_get_mclk(struct radeon_device *rdev, bool low)
2105 struct trinity_power_info *pi = trinity_get_pi(rdev);