Lines Matching refs:initialState
4359 table->initialState.levels[0].mclk.vDLL_CNTL =
4361 table->initialState.levels[0].mclk.vMCLK_PWRMGT_CNTL =
4363 table->initialState.levels[0].mclk.vMPLL_AD_FUNC_CNTL =
4365 table->initialState.levels[0].mclk.vMPLL_DQ_FUNC_CNTL =
4367 table->initialState.levels[0].mclk.vMPLL_FUNC_CNTL =
4369 table->initialState.levels[0].mclk.vMPLL_FUNC_CNTL_1 =
4371 table->initialState.levels[0].mclk.vMPLL_FUNC_CNTL_2 =
4373 table->initialState.levels[0].mclk.vMPLL_SS =
4375 table->initialState.levels[0].mclk.vMPLL_SS2 =
4378 table->initialState.levels[0].mclk.mclk_value =
4381 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL =
4383 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 =
4385 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 =
4387 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_4 =
4389 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM =
4391 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM_2 =
4394 table->initialState.levels[0].sclk.sclk_value =
4397 table->initialState.levels[0].arbRefreshState =
4400 table->initialState.levels[0].ACIndex = 0;
4404 &table->initialState.levels[0].vddc);
4410 &table->initialState.levels[0].vddc,
4414 table->initialState.levels[0].vddc.index,
4415 &table->initialState.levels[0].std_vddc);
4422 &table->initialState.levels[0].vddci);
4430 &table->initialState.levels[0].vddc);
4432 si_populate_initial_mvdd_value(rdev, &table->initialState.levels[0].mvdd);
4435 table->initialState.levels[0].aT = cpu_to_be32(reg);
4437 table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp);
4439 table->initialState.levels[0].gen2PCIE = (u8)si_pi->boot_pcie_gen;
4442 table->initialState.levels[0].strobeMode =
4447 table->initialState.levels[0].mcFlags = SISLANDS_SMC_MC_EDC_RD_FLAG | SISLANDS_SMC_MC_EDC_WR_FLAG;
4449 table->initialState.levels[0].mcFlags = 0;
4452 table->initialState.levelCount = 1;
4454 table->initialState.flags |= PPSMC_SWSTATE_FLAG_DC;
4456 table->initialState.levels[0].dpm2.MaxPS = 0;
4457 table->initialState.levels[0].dpm2.NearTDPDec = 0;
4458 table->initialState.levels[0].dpm2.AboveSafeInc = 0;
4459 table->initialState.levels[0].dpm2.BelowSafeInc = 0;
4460 table->initialState.levels[0].dpm2.PwrEfficiencyRatio = 0;
4463 table->initialState.levels[0].SQPowerThrottle = cpu_to_be32(reg);
4466 table->initialState.levels[0].SQPowerThrottle_2 = cpu_to_be32(reg);
4491 table->ACPIState = table->initialState;
4734 table->driverState = table->initialState;
4756 table->ULVState = table->initialState;