Lines Matching refs:ecclk
2918 u32 evclk, u32 ecclk, u16 *voltage)
2925 if (((evclk == 0) && (ecclk == 0)) ||
2933 (ecclk <= table->entries[i].ecclk)) {
2992 rps->ecclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].ecclk;
2993 si_get_vce_clock_voltage(rdev, rps->evclk, rps->ecclk,
2997 rps->ecclk = 0;
5918 (old_rps->ecclk != new_rps->ecclk)) {
5920 if (new_rps->evclk || new_rps->ecclk)
5924 radeon_set_vce_clocks(rdev, new_rps->evclk, new_rps->ecclk);