Lines Matching defs:data
2723 u32 data = 0, offset;
2733 data = RREG32_SMC(offset);
2736 data = RREG32(config_regs->offset << 2);
2740 data &= ~config_regs->mask;
2741 data |= ((config_regs->value << config_regs->shift) & config_regs->mask);
2747 WREG32_SMC(offset, data);
2750 WREG32(config_regs->offset << 2, data);
3879 u32 data, num_bits, num_levels;
3884 data = table->mask_low;
3886 num_bits = hweight32(data);
4316 offsetof(SMC_SIslands_MCArbDramTimingRegisters, data) +
4660 offsetof(SMC_SIslands_MCArbDramTimingRegisters, data) +
5586 SMC_SIslands_MCRegisterSet *data,
5593 data->value[i] = cpu_to_be32(entry->mc_data[j]);
5629 &mc_reg_table->data[SISLANDS_MCREGISTERTABLE_FIRST_DRIVERSTATE_SLOT + i]);
5648 &smc_mc_reg_table->data[SISLANDS_MCREGISTERTABLE_INITIAL_SLOT]);
5651 &smc_mc_reg_table->data[SISLANDS_MCREGISTERTABLE_ACPI_SLOT],
5657 &smc_mc_reg_table->data[SISLANDS_MCREGISTERTABLE_ULV_SLOT]);
5660 &smc_mc_reg_table->data[SISLANDS_MCREGISTERTABLE_ULV_SLOT],
5678 data[SISLANDS_MCREGISTERTABLE_FIRST_DRIVERSTATE_SLOT]);
5687 (u8 *)&smc_mc_reg_table->data[SISLANDS_MCREGISTERTABLE_FIRST_DRIVERSTATE_SLOT],