Lines Matching refs:PACKET3
3381 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
3384 radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));
3393 radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));
3412 radeon_ring_write(ring, PACKET3(PACKET3_SWITCH_BUFFER, 0));
3415 header = PACKET3(PACKET3_INDIRECT_BUFFER_CONST, 2);
3420 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
3426 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
3433 header = PACKET3(PACKET3_INDIRECT_BUFFER, 2);
3447 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
3450 radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));
3572 radeon_ring_write(ring, PACKET3(PACKET3_ME_INITIALIZE, 5));
3581 radeon_ring_write(ring, PACKET3(PACKET3_SET_BASE, 2));
3596 radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));
3602 radeon_ring_write(ring, PACKET3(PACKET3_PREAMBLE_CNTL, 0));
3606 radeon_ring_write(ring, PACKET3(PACKET3_CLEAR_STATE, 0));
3609 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONTEXT_REG, 2));
5084 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
5099 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
5107 radeon_ring_write(ring, PACKET3(PACKET3_WRITE_DATA, 3));
5115 radeon_ring_write(ring, PACKET3(PACKET3_WAIT_REG_MEM, 5));
5125 radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));
5730 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));
5733 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));
5741 cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, ext->reg_count));
5751 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 1));
5772 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));
5775 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));