Lines Matching refs:pl

227 		       struct rv7xx_pl *pl)
229 return (pl->flags & ATOM_PPLIB_R600_FLAGS_LOWPOWER) ?
614 struct rv7xx_pl *pl,
622 ((pl->flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2) ? 1 : 0) : 0;
623 level->gen2XSP = (pl->flags & ATOM_PPLIB_R600_FLAGS_PCIEGEN2) ? 1 : 0;
624 level->backbias = (pl->flags & ATOM_PPLIB_R600_FLAGS_BACKBIASENABLE) ? 1 : 0;
628 ret = rv740_populate_sclk_value(rdev, pl->sclk,
631 ret = rv730_populate_sclk_value(rdev, pl->sclk,
634 ret = rv770_populate_sclk_value(rdev, pl->sclk,
641 if (pl->mclk <= pi->mclk_strobe_mode_threshold)
643 rv740_get_mclk_frequency_ratio(pl->mclk) | 0x10;
647 if (pl->mclk > pi->mclk_edc_enable_threshold)
652 ret = rv740_populate_mclk_value(rdev, pl->sclk,
653 pl->mclk, &level->mclk);
655 ret = rv730_populate_mclk_value(rdev, pl->sclk,
656 pl->mclk, &level->mclk);
658 ret = rv770_populate_mclk_value(rdev, pl->sclk,
659 pl->mclk, &level->mclk);
663 ret = rv770_populate_vddc_value(rdev, pl->vddc,
668 ret = rv770_populate_mvdd_value(rdev, pl->mclk, &level->mvdd);
2181 struct rv7xx_pl *pl;
2185 pl = &ps->low;
2188 pl = &ps->medium;
2192 pl = &ps->high;
2202 pl->vddc = le16_to_cpu(clock_info->evergreen.usVDDC);
2203 pl->vddci = le16_to_cpu(clock_info->evergreen.usVDDCI);
2204 pl->flags = le32_to_cpu(clock_info->evergreen.ulFlags);
2211 pl->vddc = le16_to_cpu(clock_info->r600.usVDDC);
2212 pl->flags = le32_to_cpu(clock_info->r600.ulFlags);
2215 pl->mclk = mclk;
2216 pl->sclk = sclk;
2219 if (pl->vddc == 0xff01) {
2221 pl->vddc = pi->max_vddc;
2225 pi->acpi_vddc = pl->vddc;
2227 eg_pi->acpi_vddci = pl->vddci;
2237 eg_pi->ulv.pl = pl;
2241 if (pi->min_vddc_in_table > pl->vddc)
2242 pi->min_vddc_in_table = pl->vddc;
2244 if (pi->max_vddc_in_table < pl->vddc)
2245 pi->max_vddc_in_table = pl->vddc;
2251 pl->mclk = rdev->clock.default_mclk;
2252 pl->sclk = rdev->clock.default_sclk;
2253 pl->vddc = vddc;
2254 pl->vddci = vddci;
2259 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.sclk = pl->sclk;
2260 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk;
2261 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddc = pl->vddc;
2262 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.vddci = pl->vddci;
2436 struct rv7xx_pl *pl;
2442 pl = &ps->low;
2444 pl->sclk, pl->mclk, pl->vddc, pl->vddci);
2445 pl = &ps->medium;
2447 pl->sclk, pl->mclk, pl->vddc, pl->vddci);
2448 pl = &ps->high;
2450 pl->sclk, pl->mclk, pl->vddc, pl->vddci);
2452 pl = &ps->low;
2454 pl->sclk, pl->mclk, pl->vddc);
2455 pl = &ps->medium;
2457 pl->sclk, pl->mclk, pl->vddc);
2458 pl = &ps->high;
2460 pl->sclk, pl->mclk, pl->vddc);
2470 struct rv7xx_pl *pl;
2479 pl = &ps->low;
2481 pl = &ps->medium;
2483 pl = &ps->high;
2487 current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci);
2490 current_index, pl->sclk, pl->mclk, pl->vddc);
2499 struct rv7xx_pl *pl;
2508 pl = &ps->low;
2510 pl = &ps->medium;
2512 pl = &ps->high;
2513 return pl->sclk;
2521 struct rv7xx_pl *pl;
2530 pl = &ps->low;
2532 pl = &ps->medium;
2534 pl = &ps->high;
2535 return pl->mclk;