Lines Matching refs:mclk
387 RV7XX_SMC_MCLK_VALUE *mclk)
472 mclk->mclk770.mclk_value = cpu_to_be32(memory_clock);
473 mclk->mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl);
474 mclk->mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2);
475 mclk->mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
476 mclk->mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);
477 mclk->mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl);
478 mclk->mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl);
591 int rv770_populate_mvdd_value(struct radeon_device *rdev, u32 mclk,
602 if (mclk <= pi->mvdd_split_frequency) {
641 if (pl->mclk <= pi->mclk_strobe_mode_threshold)
643 rv740_get_mclk_frequency_ratio(pl->mclk) | 0x10;
647 if (pl->mclk > pi->mclk_edc_enable_threshold)
653 pl->mclk, &level->mclk);
656 pl->mclk, &level->mclk);
659 pl->mclk, &level->mclk);
668 ret = rv770_populate_mvdd_value(rdev, pl->mclk, &level->mvdd);
753 state->high.mclk);
981 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL = cpu_to_be32(mpll_ad_func_cntl);
982 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 = cpu_to_be32(mpll_ad_func_cntl_2);
983 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL = cpu_to_be32(mpll_dq_func_cntl);
984 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 = cpu_to_be32(mpll_dq_func_cntl_2);
986 table->ACPIState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL = cpu_to_be32(mclk_pwrmgt_cntl);
987 table->ACPIState.levels[0].mclk.mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl);
989 table->ACPIState.levels[0].mclk.mclk770.mclk_value = 0;
1030 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL =
1032 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 =
1034 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL =
1036 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 =
1038 table->initialState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL =
1040 table->initialState.levels[0].mclk.mclk770.vDLL_CNTL =
1043 table->initialState.levels[0].mclk.mclk770.vMPLL_SS =
1045 table->initialState.levels[0].mclk.mclk770.vMPLL_SS2 =
1048 table->initialState.levels[0].mclk.mclk770.mclk_value =
1049 cpu_to_be32(initial_state->low.mclk);
1092 if (initial_state->low.mclk <= pi->mclk_strobe_mode_threshold)
1094 rv740_get_mclk_frequency_ratio(initial_state->low.mclk) | 0x10;
1098 if (initial_state->low.mclk >= pi->mclk_edc_enable_threshold)
1756 if (current_state->high.mclk <= pi->mclk_odt_threshold)
1759 if (new_state->high.mclk <= pi->mclk_odt_threshold)
1785 if (current_state->high.mclk <= pi->mclk_odt_threshold)
1788 if (new_state->high.mclk <= pi->mclk_odt_threshold)
2180 u32 sclk, mclk;
2199 mclk = le16_to_cpu(clock_info->evergreen.usMemoryClockLow);
2200 mclk |= clock_info->evergreen.ucMemoryClockHigh << 16;
2208 mclk = le16_to_cpu(clock_info->r600.usMemoryClockLow);
2209 mclk |= clock_info->r600.ucMemoryClockHigh << 16;
2215 pl->mclk = mclk;
2251 pl->mclk = rdev->clock.default_mclk;
2260 rdev->pm.dpm.dyn_state.max_clock_voltage_on_ac.mclk = pl->mclk;
2443 printk("\t\tpower level 0 sclk: %u mclk: %u vddc: %u vddci: %u\n",
2444 pl->sclk, pl->mclk, pl->vddc, pl->vddci);
2446 printk("\t\tpower level 1 sclk: %u mclk: %u vddc: %u vddci: %u\n",
2447 pl->sclk, pl->mclk, pl->vddc, pl->vddci);
2449 printk("\t\tpower level 2 sclk: %u mclk: %u vddc: %u vddci: %u\n",
2450 pl->sclk, pl->mclk, pl->vddc, pl->vddci);
2453 printk("\t\tpower level 0 sclk: %u mclk: %u vddc: %u\n",
2454 pl->sclk, pl->mclk, pl->vddc);
2456 printk("\t\tpower level 1 sclk: %u mclk: %u vddc: %u\n",
2457 pl->sclk, pl->mclk, pl->vddc);
2459 printk("\t\tpower level 2 sclk: %u mclk: %u vddc: %u\n",
2460 pl->sclk, pl->mclk, pl->vddc);
2486 seq_printf(m, "power level %d sclk: %u mclk: %u vddc: %u vddci: %u\n",
2487 current_index, pl->sclk, pl->mclk, pl->vddc, pl->vddci);
2489 seq_printf(m, "power level %d sclk: %u mclk: %u vddc: %u\n",
2490 current_index, pl->sclk, pl->mclk, pl->vddc);
2535 return pl->mclk;
2565 return requested_state->low.mclk;
2567 return requested_state->high.mclk;
2576 /* mclk switching doesn't seem to work reliably on desktop RV770s */
2579 switch_limit = 0xffffffff; /* disable mclk switching */