Lines Matching refs:initialState
241 table->ACPIState = table->initialState;
326 table->initialState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL =
328 table->initialState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL2 =
330 table->initialState.levels[0].mclk.mclk730.vMPLL_FUNC_CNTL3 =
332 table->initialState.levels[0].mclk.mclk730.vMCLK_PWRMGT_CNTL =
334 table->initialState.levels[0].mclk.mclk730.vDLL_CNTL =
336 table->initialState.levels[0].mclk.mclk730.vMPLL_SS =
338 table->initialState.levels[0].mclk.mclk730.vMPLL_SS2 =
341 table->initialState.levels[0].mclk.mclk730.mclk_value =
344 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL =
346 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 =
348 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 =
350 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM =
352 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM_2 =
355 table->initialState.levels[0].sclk.sclk_value =
358 table->initialState.levels[0].arbValue = MC_CG_ARB_FREQ_F0;
360 table->initialState.levels[0].seqValue =
365 &table->initialState.levels[0].vddc);
367 &table->initialState.levels[0].mvdd);
371 table->initialState.levels[0].aT = cpu_to_be32(a_t);
373 table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp);
376 table->initialState.levels[0].gen2PCIE = 1;
378 table->initialState.levels[0].gen2PCIE = 0;
380 table->initialState.levels[0].gen2XSP = 1;
382 table->initialState.levels[0].gen2XSP = 0;
384 table->initialState.levels[1] = table->initialState.levels[0];
385 table->initialState.levels[2] = table->initialState.levels[0];
387 table->initialState.flags |= PPSMC_SWSTATE_FLAG_DC;