Lines Matching defs:clock
139 u32 clock, struct rv6xx_sclk_stepping *step)
145 clock, false, ÷rs);
154 step->vco_frequency = clock * step->post_divider;
163 u32 ref_clk = rdev->clock.spll.reference_freq;
297 u32 clock, u32 index)
301 rv6xx_convert_clock_to_stepping(rdev, clock, &step);
428 u32 ref_clk = rdev->clock.spll.reference_freq;
549 u32 clock, enum r600_power_level level)
551 u32 ref_clk = rdev->clock.spll.reference_freq;
559 if (clock && pi->sclk_ss) {
560 if (radeon_atom_get_clock_dividers(rdev, COMPUTE_ENGINE_PLL_PARAM, clock, false, ÷rs) == 0) {
598 u32 entry, u32 clock)
602 if (radeon_atom_get_clock_dividers(rdev, COMPUTE_MEMORY_PLL_PARAM, clock, false, ÷rs))
655 u32 ref_clk = rdev->clock.mpll.reference_freq;
840 u32 ref_clk = rdev->clock.spll.reference_freq;
1866 pl->mclk = rdev->clock.default_mclk;
1867 pl->sclk = rdev->clock.default_sclk;