Lines Matching refs:dclk
572 (new_ps->dclk == old_ps->dclk))
578 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk);
589 (new_ps->dclk == old_ps->dclk))
595 radeon_set_uvd_clocks(rdev, new_ps->vclk, new_ps->dclk);
729 rps->dclk = le32_to_cpu(non_clock_info->ulDCLK);
732 rps->dclk = 0;
736 if ((rps->vclk == 0) || (rps->dclk == 0)) {
738 rps->dclk = RS780_DEFAULT_DCLK_FREQ;
946 printk("\tuvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk);
995 seq_printf(m, "uvd vclk: %d dclk: %d\n", rps->vclk, rps->dclk);