Lines Matching defs:radeon_crtc
120 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id];
121 u32 tmp = RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset);
126 WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp);
129 WREG32(AVIVO_D1GRPH_FLIP_CONTROL + radeon_crtc->crtc_offset,
131 WREG32(AVIVO_D1GRPH_SECONDARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset,
133 WREG32(AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset,
138 if (RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) & AVIVO_D1GRPH_SURFACE_UPDATE_PENDING)
146 WREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset, tmp);
151 struct radeon_crtc *radeon_crtc = rdev->mode_info.crtcs[crtc_id];
154 return !!(RREG32(AVIVO_D1GRPH_UPDATE + radeon_crtc->crtc_offset) &
320 struct radeon_crtc *radeon_crtc;
325 radeon_crtc = to_radeon_crtc(crtc);
326 if (radeon_crtc->enabled) {
327 tmp = RREG32(AVIVO_D1CRTC_CONTROL + radeon_crtc->crtc_offset);
329 WREG32(AVIVO_D1CRTC_CONTROL + radeon_crtc->crtc_offset, tmp);
338 struct radeon_crtc *radeon_crtc;
343 radeon_crtc = to_radeon_crtc(crtc);
344 if (radeon_crtc->enabled) {
345 tmp = RREG32(AVIVO_D1CRTC_CONTROL + radeon_crtc->crtc_offset);
347 WREG32(AVIVO_D1CRTC_CONTROL + radeon_crtc->crtc_offset, tmp);