Lines Matching refs:ib
349 struct radeon_ib ib;
353 r = radeon_ib_get(rdev, ring, &ib, NULL, ib_size_dw * 4);
355 DRM_ERROR("radeon: failed to get ib (%d).\n", r);
359 dummy = ib.gpu_addr + 1024;
362 ib.length_dw = 0;
363 ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000c); /* len */
364 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001); /* session cmd */
365 ib.ptr[ib.length_dw++] = cpu_to_le32(handle);
367 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000030); /* len */
368 ib.ptr[ib.length_dw++] = cpu_to_le32(0x01000001); /* create cmd */
369 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000000);
370 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000042);
371 ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000a);
372 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001);
373 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000080);
374 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000060);
375 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000100);
376 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000100);
377 ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000c);
378 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000000);
380 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000014); /* len */
381 ib.ptr[ib.length_dw++] = cpu_to_le32(0x05000005); /* feedback buffer */
382 ib.ptr[ib.length_dw++] = cpu_to_le32(upper_32_bits(dummy));
383 ib.ptr[ib.length_dw++] = cpu_to_le32(dummy);
384 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001);
386 for (i = ib.length_dw; i < ib_size_dw; ++i)
387 ib.ptr[i] = cpu_to_le32(0x0);
389 r = radeon_ib_schedule(rdev, &ib, NULL, false);
391 DRM_ERROR("radeon: failed to schedule ib (%d).\n", r);
395 *fence = radeon_fence_ref(ib.fence);
397 radeon_ib_free(rdev, &ib);
416 struct radeon_ib ib;
420 r = radeon_ib_get(rdev, ring, &ib, NULL, ib_size_dw * 4);
422 DRM_ERROR("radeon: failed to get ib (%d).\n", r);
426 dummy = ib.gpu_addr + 1024;
429 ib.length_dw = 0;
430 ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000c); /* len */
431 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001); /* session cmd */
432 ib.ptr[ib.length_dw++] = cpu_to_le32(handle);
434 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000014); /* len */
435 ib.ptr[ib.length_dw++] = cpu_to_le32(0x05000005); /* feedback buffer */
436 ib.ptr[ib.length_dw++] = cpu_to_le32(upper_32_bits(dummy));
437 ib.ptr[ib.length_dw++] = cpu_to_le32(dummy);
438 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001);
440 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000008); /* len */
441 ib.ptr[ib.length_dw++] = cpu_to_le32(0x02000001); /* destroy cmd */
443 for (i = ib.length_dw; i < ib_size_dw; ++i)
444 ib.ptr[i] = cpu_to_le32(0x0);
446 r = radeon_ib_schedule(rdev, &ib, NULL, false);
448 DRM_ERROR("radeon: failed to schedule ib (%d).\n", r);
452 *fence = radeon_fence_ref(ib.fence);
454 radeon_ib_free(rdev, &ib);
492 p->ib.ptr[lo] = start & 0xFFFFFFFF;
493 p->ib.ptr[hi] = start >> 32;
715 * @ib: the IB to execute
718 void radeon_vce_ib_execute(struct radeon_device *rdev, struct radeon_ib *ib)
720 struct radeon_ring *ring = &rdev->ring[ib->ring];
722 radeon_ring_write(ring, cpu_to_le32(ib->gpu_addr));
723 radeon_ring_write(ring, cpu_to_le32(upper_32_bits(ib->gpu_addr)));
724 radeon_ring_write(ring, cpu_to_le32(ib->length_dw));
808 DRM_ERROR("radeon: failed to get destroy ib (%d).\n", r);
820 DRM_INFO("ib test on ring %d succeeded\n", ring->idx);