Lines Matching defs:rdev
66 int radeon_uvd_init(struct radeon_device *rdev)
72 INIT_DELAYED_WORK(&rdev->uvd.idle_work, radeon_uvd_idle_work_handler);
74 switch (rdev->family) {
137 rdev->uvd.fw_header_present = false;
138 rdev->uvd.max_handles = RADEON_DEFAULT_UVD_HANDLES;
141 r = request_firmware(&rdev->uvd_fw, fw_name, rdev->dev);
143 dev_err(rdev->dev, "radeon_uvd: Can't load firmware \"%s\"\n",
146 struct common_firmware_header *hdr = (void *)rdev->uvd_fw->data;
149 r = radeon_ucode_validate(rdev->uvd_fw);
153 rdev->uvd.fw_header_present = true;
166 rdev->uvd.max_handles = RADEON_MAX_UVD_HANDLES;
176 r = request_firmware(&rdev->uvd_fw, legacy_fw_name, rdev->dev);
178 dev_err(rdev->dev, "radeon_uvd: Can't load firmware \"%s\"\n",
184 bo_size = RADEON_GPU_PAGE_ALIGN(rdev->uvd_fw->size + 8) +
186 RADEON_UVD_SESSION_SIZE * rdev->uvd.max_handles;
187 r = radeon_bo_create(rdev, bo_size, PAGE_SIZE, true,
189 NULL, &rdev->uvd.vcpu_bo);
191 dev_err(rdev->dev, "(%d) failed to allocate UVD bo\n", r);
195 r = radeon_bo_reserve(rdev->uvd.vcpu_bo, false);
197 radeon_bo_unref(&rdev->uvd.vcpu_bo);
198 dev_err(rdev->dev, "(%d) failed to reserve UVD bo\n", r);
202 r = radeon_bo_pin(rdev->uvd.vcpu_bo, RADEON_GEM_DOMAIN_VRAM,
203 &rdev->uvd.gpu_addr);
205 radeon_bo_unreserve(rdev->uvd.vcpu_bo);
206 radeon_bo_unref(&rdev->uvd.vcpu_bo);
207 dev_err(rdev->dev, "(%d) UVD bo pin failed\n", r);
211 r = radeon_bo_kmap(rdev->uvd.vcpu_bo, &rdev->uvd.cpu_addr);
213 dev_err(rdev->dev, "(%d) UVD map failed\n", r);
217 radeon_bo_unreserve(rdev->uvd.vcpu_bo);
219 for (i = 0; i < rdev->uvd.max_handles; ++i) {
220 atomic_set(&rdev->uvd.handles[i], 0);
221 rdev->uvd.filp[i] = NULL;
222 rdev->uvd.img_size[i] = 0;
228 void radeon_uvd_fini(struct radeon_device *rdev)
232 if (rdev->uvd.vcpu_bo == NULL)
235 r = radeon_bo_reserve(rdev->uvd.vcpu_bo, false);
237 radeon_bo_kunmap(rdev->uvd.vcpu_bo);
238 radeon_bo_unpin(rdev->uvd.vcpu_bo);
239 radeon_bo_unreserve(rdev->uvd.vcpu_bo);
242 radeon_bo_unref(&rdev->uvd.vcpu_bo);
244 radeon_ring_fini(rdev, &rdev->ring[R600_RING_TYPE_UVD_INDEX]);
246 release_firmware(rdev->uvd_fw);
249 int radeon_uvd_suspend(struct radeon_device *rdev)
253 if (rdev->uvd.vcpu_bo == NULL)
256 for (i = 0; i < rdev->uvd.max_handles; ++i) {
257 uint32_t handle = atomic_read(&rdev->uvd.handles[i]);
261 radeon_uvd_note_usage(rdev);
263 r = radeon_uvd_get_destroy_msg(rdev,
273 rdev->uvd.filp[i] = NULL;
274 atomic_set(&rdev->uvd.handles[i], 0);
281 int radeon_uvd_resume(struct radeon_device *rdev)
286 if (rdev->uvd.vcpu_bo == NULL)
289 memcpy_toio((void __iomem *)rdev->uvd.cpu_addr, rdev->uvd_fw->data, rdev->uvd_fw->size);
291 size = radeon_bo_size(rdev->uvd.vcpu_bo);
292 size -= rdev->uvd_fw->size;
294 ptr = rdev->uvd.cpu_addr;
295 ptr += rdev->uvd_fw->size;
328 void radeon_uvd_free_handles(struct radeon_device *rdev, struct drm_file *filp)
331 for (i = 0; i < rdev->uvd.max_handles; ++i) {
332 uint32_t handle = atomic_read(&rdev->uvd.handles[i]);
333 if (handle != 0 && rdev->uvd.filp[i] == filp) {
336 radeon_uvd_note_usage(rdev);
338 r = radeon_uvd_get_destroy_msg(rdev,
348 rdev->uvd.filp[i] = NULL;
349 atomic_set(&rdev->uvd.handles[i], 0);
454 if (p->rdev->family >= CHIP_PALM)
516 for (i = 0; i < p->rdev->uvd.max_handles; ++i) {
517 if (atomic_read(&p->rdev->uvd.handles[i]) == handle) {
522 if (!atomic_cmpxchg(&p->rdev->uvd.handles[i], 0, handle)) {
523 p->rdev->uvd.filp[i] = p->filp;
524 p->rdev->uvd.img_size[i] = img_size;
542 for (i = 0; i < p->rdev->uvd.max_handles; ++i) {
543 if (atomic_read(&p->rdev->uvd.handles[i]) == handle) {
544 if (p->rdev->uvd.filp[i] != p->filp) {
557 for (i = 0; i < p->rdev->uvd.max_handles; ++i)
558 atomic_cmpxchg(&p->rdev->uvd.handles[i], handle, 0);
625 (start >> 28) != (p->rdev->uvd.gpu_addr >> 28)) {
740 static int radeon_uvd_send_msg(struct radeon_device *rdev,
747 r = radeon_ib_get(rdev, ring, &ib, NULL, 64);
763 r = radeon_ib_schedule(rdev, &ib, NULL, false);
768 radeon_ib_free(rdev, &ib);
777 int radeon_uvd_get_create_msg(struct radeon_device *rdev, int ring,
781 uint64_t offs = radeon_bo_size(rdev->uvd.vcpu_bo) -
784 uint32_t *msg = rdev->uvd.cpu_addr + offs;
785 uint64_t addr = rdev->uvd.gpu_addr + offs;
789 r = radeon_bo_reserve(rdev->uvd.vcpu_bo, true);
808 r = radeon_uvd_send_msg(rdev, ring, addr, fence);
809 radeon_bo_unreserve(rdev->uvd.vcpu_bo);
813 int radeon_uvd_get_destroy_msg(struct radeon_device *rdev, int ring,
817 uint64_t offs = radeon_bo_size(rdev->uvd.vcpu_bo) -
820 uint32_t *msg = rdev->uvd.cpu_addr + offs;
821 uint64_t addr = rdev->uvd.gpu_addr + offs;
825 r = radeon_bo_reserve(rdev->uvd.vcpu_bo, true);
837 r = radeon_uvd_send_msg(rdev, ring, addr, fence);
838 radeon_bo_unreserve(rdev->uvd.vcpu_bo);
845 * @rdev: radeon_device pointer
851 static void radeon_uvd_count_handles(struct radeon_device *rdev,
859 for (i = 0; i < rdev->uvd.max_handles; ++i) {
860 if (!atomic_read(&rdev->uvd.handles[i]))
863 if (rdev->uvd.img_size[i] >= 720*576)
872 struct radeon_device *rdev =
875 if (radeon_fence_count_emitted(rdev, R600_RING_TYPE_UVD_INDEX) == 0) {
876 if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
877 radeon_uvd_count_handles(rdev, &rdev->pm.dpm.sd,
878 &rdev->pm.dpm.hd);
879 radeon_dpm_enable_uvd(rdev, false);
881 radeon_set_uvd_clocks(rdev, 0, 0);
884 schedule_delayed_work(&rdev->uvd.idle_work,
889 void radeon_uvd_note_usage(struct radeon_device *rdev)
892 bool set_clocks = !cancel_delayed_work_sync(&rdev->uvd.idle_work);
893 set_clocks &= schedule_delayed_work(&rdev->uvd.idle_work,
896 if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
898 radeon_uvd_count_handles(rdev, &sd, &hd);
899 if ((rdev->pm.dpm.sd != sd) ||
900 (rdev->pm.dpm.hd != hd)) {
901 rdev->pm.dpm.sd = sd;
902 rdev->pm.dpm.hd = hd;
909 if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled) {
910 radeon_dpm_enable_uvd(rdev, true);
912 radeon_set_uvd_clocks(rdev, 53300, 40000);
942 * @rdev: radeon_device pointer
959 int radeon_uvd_calc_upll_dividers(struct radeon_device *rdev,
969 unsigned vco_freq, ref_freq = rdev->clock.spll.reference_freq;
1022 int radeon_uvd_send_upll_ctlreq(struct radeon_device *rdev,