Lines Matching defs:fence
51 * for GPU/CPU synchronization. When the fence is written,
52 * it is expected that all buffers associated with that fence
60 * radeon_fence_write - write a fence value
64 * @ring: ring index the fence is associated with
66 * Writes a fence value to memory or a scratch register (all asics).
81 * radeon_fence_read - read a fence value
84 * @ring: ring index the fence is associated with
86 * Reads a fence value from memory or a scratch register (all asics).
87 * Returns the value of the fence read from memory or register.
126 * radeon_fence_emit - emit a fence on the requested ring
129 * @fence: radeon fence object
130 * @ring: ring index the fence is associated with
132 * Emits a fence command on the requested ring (all asics).
136 struct radeon_fence **fence,
142 *fence = kmalloc(sizeof(struct radeon_fence), GFP_KERNEL);
143 if ((*fence) == NULL) {
146 (*fence)->rdev = rdev;
147 (*fence)->seq = seq = ++rdev->fence_drv[ring].sync_seq[ring];
148 (*fence)->ring = ring;
149 (*fence)->is_vm_update = false;
150 dma_fence_init(&(*fence)->base, &radeon_fence_ops,
154 radeon_fence_ring_emit(rdev, ring, *fence);
155 trace_radeon_fence_emit(rdev->ddev, ring, (*fence)->seq);
164 * for the fence locking itself, so unlocked variants are used for
169 struct radeon_fence *fence;
172 fence = container_of(wait, struct radeon_fence, fence_wake);
178 seq = atomic64_read(&fence->rdev->fence_drv[fence->ring].last_seq);
179 if (seq >= fence->seq) {
180 int ret = dma_fence_signal_locked(&fence->base);
183 DMA_FENCE_TRACE(&fence->base, "signaled from irq context\n");
185 DMA_FENCE_TRACE(&fence->base, "was already signaled\n");
187 radeon_irq_kms_sw_irq_put(fence->rdev, fence->ring);
188 __remove_wait_queue(&fence->rdev->fence_queue, &fence->fence_wake);
189 dma_fence_put(&fence->base);
191 DMA_FENCE_TRACE(&fence->base, "pending\n");
196 * radeon_fence_activity - check for fence activity
199 * @ring: ring index the fence is associated with
201 * Checks the current fence value and calculates the last
202 * signalled fence value. Returns true if activity occured
218 * continuously new fence signaled ie radeon_fence_read needs
246 * checking if a fence is signaled as it means that the
253 * fact that we might have set an older fence
272 * Checks for fence activity and if there is none probe
307 dev_warn(rdev->dev, "GPU lockup (current fence id "
308 "0x%016llx last fence id 0x%016llx on ring %d)\n",
320 * radeon_fence_process - process a fence
323 * @ring: ring index the fence is associated with
325 * Checks the current fence value and wakes the fence queue
335 * radeon_fence_seq_signaled - check if a fence sequence number has signaled
339 * @ring: ring index the fence is associated with
341 * Check if the last signaled fence sequnce number is >= the requested
343 * Returns true if the fence has signaled (current fence value
344 * is >= requested value) or false if it has not (current fence
364 struct radeon_fence *fence = to_radeon_fence(f);
365 struct radeon_device *rdev = fence->rdev;
366 unsigned ring = fence->ring;
367 u64 seq = fence->seq;
385 * radeon_fence_enable_signaling - enable signalling on fence
386 * @fence: fence
389 * to fence_queue that checks if this fence is signaled, and if so it
390 * signals the fence and removes itself.
394 struct radeon_fence *fence = to_radeon_fence(f);
395 struct radeon_device *rdev = fence->rdev;
397 if (atomic64_read(&rdev->fence_drv[fence->ring].last_seq) >= fence->seq)
401 radeon_irq_kms_sw_irq_get(rdev, fence->ring);
403 if (radeon_fence_activity(rdev, fence->ring))
406 /* did fence get signaled after we enabled the sw irq? */
407 if (atomic64_read(&rdev->fence_drv[fence->ring].last_seq) >= fence->seq) {
408 radeon_irq_kms_sw_irq_put(rdev, fence->ring);
416 if (radeon_irq_kms_sw_irq_get_delayed(rdev, fence->ring))
417 rdev->fence_drv[fence->ring].delayed_irq = true;
418 radeon_fence_schedule_check(rdev, fence->ring);
421 fence->fence_wake.flags = 0;
422 fence->fence_wake.private = NULL;
423 fence->fence_wake.func = radeon_fence_check_signaled;
424 __add_wait_queue(&rdev->fence_queue, &fence->fence_wake);
427 DMA_FENCE_TRACE(&fence->base, "armed on ring %i!\n", fence->ring);
432 * radeon_fence_signaled - check if a fence has signaled
434 * @fence: radeon fence object
436 * Check if the requested fence has signaled (all asics).
437 * Returns true if the fence has signaled or false if it has not.
439 bool radeon_fence_signaled(struct radeon_fence *fence)
441 if (!fence)
444 if (radeon_fence_seq_signaled(fence->rdev, fence->seq, fence->ring)) {
447 ret = dma_fence_signal(&fence->base);
449 DMA_FENCE_TRACE(&fence->base, "signaled from radeon_fence_signaled\n");
461 * Check if the last signaled fence sequnce number is >= the requested
538 * radeon_fence_wait_timeout - wait for a fence to signal with timeout
540 * @fence: radeon fence object
543 * Wait for the requested fence to signal (all asics).
545 * (false) sleep when waiting for the fence.
550 long radeon_fence_wait_timeout(struct radeon_fence *fence, bool intr, long timeout)
562 if (WARN_ON_ONCE(!to_radeon_fence(&fence->base)))
563 return dma_fence_wait(&fence->base, intr);
565 seq[fence->ring] = fence->seq;
566 r = radeon_fence_wait_seq_timeout(fence->rdev, seq, intr, timeout);
571 r_sig = dma_fence_signal(&fence->base);
573 DMA_FENCE_TRACE(&fence->base, "signaled from fence_wait\n");
578 * radeon_fence_wait - wait for a fence to signal
580 * @fence: radeon fence object
583 * Wait for the requested fence to signal (all asics).
585 * (false) sleep when waiting for the fence.
586 * Returns 0 if the fence has passed, error for all other cases.
588 int radeon_fence_wait(struct radeon_fence *fence, bool intr)
590 long r = radeon_fence_wait_timeout(fence, intr, MAX_SCHEDULE_TIMEOUT);
599 * radeon_fence_wait_any - wait for a fence to signal on any ring
602 * @fences: radeon fence object(s)
605 * Wait for any requested fence to signal (all asics). Fence
609 * Returns 0 if any fence has passed, error for all other cases.
642 * radeon_fence_wait_next - wait for the next fence to signal
645 * @ring: ring index the fence is associated with
647 * Wait for the next fence on the requested ring to signal (all asics).
648 * Returns 0 if the next fence has passed, error for all other cases.
659 already the last emited fence */
672 * @ring: ring index the fence is associated with
699 * radeon_fence_ref - take a ref on a fence
701 * @fence: radeon fence object
703 * Take a reference on a fence (all asics).
704 * Returns the fence.
706 struct radeon_fence *radeon_fence_ref(struct radeon_fence *fence)
708 dma_fence_get(&fence->base);
709 return fence;
713 * radeon_fence_unref - remove a ref on a fence
715 * @fence: radeon fence object
717 * Remove a reference on a fence (all asics).
719 void radeon_fence_unref(struct radeon_fence **fence)
721 struct radeon_fence *tmp = *fence;
723 *fence = NULL;
733 * @ring: ring index the fence is associated with
744 * but it's ok to report slightly wrong fence count here.
759 * @fence: radeon fence object
762 * Check if the fence needs to be synced against another ring
767 bool radeon_fence_need_sync(struct radeon_fence *fence, int dst_ring)
771 if (!fence) {
775 if (fence->ring == dst_ring) {
780 fdrv = &fence->rdev->fence_drv[dst_ring];
781 if (fence->seq <= fdrv->sync_seq[fence->ring]) {
791 * @fence: radeon fence object
794 * Note the sequence number at which point the fence will
797 void radeon_fence_note_sync(struct radeon_fence *fence, int dst_ring)
802 if (!fence) {
806 if (fence->ring == dst_ring) {
811 src = &fence->rdev->fence_drv[fence->ring];
812 dst = &fence->rdev->fence_drv[dst_ring];
822 * radeon_fence_driver_start_ring - make the fence driver
826 * @ring: ring index to start the fence driver on
828 * Make the fence driver ready for processing (all asics).
830 * start the fence driver on the rings it has.
848 /* put fence directly behind firmware */
857 dev_err(rdev->dev, "fence failed to get scratch register\n");
868 dev_info(rdev->dev, "fence driver on ring %d use gpu addr 0x%016llx\n",
874 * radeon_fence_driver_init_ring - init the fence driver
878 * @ring: ring index to start the fence driver on
880 * Init the fence driver for the requested ring (all asics).
900 * radeon_fence_driver_init - init the fence driver
905 * Init the fence driver for all possible rings (all asics).
907 * start the fence driver on the rings it has using
920 dev_err(rdev->dev, "fence debugfs file creation failed\n");
926 * radeon_fence_driver_fini - tear down the fence driver
931 * Tear down the fence driver for all possible rings (all asics).
955 * radeon_fence_driver_force_completion - force all fence waiter to complete
960 * In case of GPU reset failure make sure no process keep waiting on fence
990 seq_printf(m, "Last signaled fence 0x%016llx\n",
1007 * Manually trigger a gpu reset at the next fence wait.
1039 static const char *radeon_fence_get_driver_name(struct dma_fence *fence)
1046 struct radeon_fence *fence = to_radeon_fence(f);
1047 switch (fence->ring) {
1060 static inline bool radeon_test_signaled(struct radeon_fence *fence)
1062 return test_bit(DMA_FENCE_FLAG_SIGNALED_BIT, &fence->base.flags);
1071 radeon_fence_wait_cb(struct dma_fence *fence, struct dma_fence_cb *cb)
1082 struct radeon_fence *fence = to_radeon_fence(f);
1083 struct radeon_device *rdev = fence->rdev;
1101 if (radeon_test_signaled(fence))