Lines Matching defs:bits
535 * If there is not enough space to fit the unvisible VRAM in the 32bits
1178 * Max GPUVM size for Cayman, SI and CI are 40 bits.
1186 /* defines number of bits in page table versus page directory,
1187 * a page is 4KB so we have 12 bits offset, minimum 9 bits in the
1188 * page table and the remaining bits are in the page directory */
1191 /* Total bits covered by PD + PTs */
1192 unsigned bits = ilog2(radeon_vm_size) + 18;
1197 radeon_vm_block_size = bits - 9;
1199 radeon_vm_block_size = (bits + 3) / 2;
1335 * Max GPUVM size for cayman+ is 40 bits.
1368 * PCIE - can handle 40-bits.
1369 * IGP - can handle 40-bits
1371 * PCI - dma32 for legacy pci gart, 40 bits on newer asics