Lines Matching refs:dcpll
185 struct radeon_pll *dcpll = &rdev->clock.dcpll;
299 /* dcpll is DCE4 only */
300 dcpll->min_post_div = 2;
301 dcpll->max_post_div = 0x7f;
302 dcpll->min_frac_feedback_div = 0;
303 dcpll->max_frac_feedback_div = 9;
304 dcpll->min_ref_div = 2;
305 dcpll->max_ref_div = 0x3ff;
306 dcpll->min_feedback_div = 4;
307 dcpll->max_feedback_div = 0xfff;
308 dcpll->best_vco = 0;