Lines Matching defs:gpio
54 ATOM_GPIO_I2C_ASSIGMENT *gpio,
61 if ((le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0018) ||
62 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x0019) ||
63 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x001a)) {
64 gpio->ucClkMaskShift = 0x19;
65 gpio->ucDataMaskShift = 0x18;
72 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x1936) &&
73 (gpio->sucI2cId.ucAccess == 0)) {
74 gpio->sucI2cId.ucAccess = 0x97;
75 gpio->ucDataMaskShift = 8;
76 gpio->ucDataEnShift = 8;
77 gpio->ucDataY_Shift = 8;
78 gpio->ucDataA_Shift = 8;
85 (le16_to_cpu(gpio->usClkMaskRegisterIndex) == 0x1fda) &&
86 (gpio->sucI2cId.ucAccess == 0x94))
87 gpio->sucI2cId.ucAccess = 0x14;
91 static struct radeon_i2c_bus_rec radeon_get_bus_rec_for_i2c_gpio(ATOM_GPIO_I2C_ASSIGMENT *gpio)
97 i2c.mask_clk_reg = le16_to_cpu(gpio->usClkMaskRegisterIndex) * 4;
98 i2c.mask_data_reg = le16_to_cpu(gpio->usDataMaskRegisterIndex) * 4;
99 i2c.en_clk_reg = le16_to_cpu(gpio->usClkEnRegisterIndex) * 4;
100 i2c.en_data_reg = le16_to_cpu(gpio->usDataEnRegisterIndex) * 4;
101 i2c.y_clk_reg = le16_to_cpu(gpio->usClkY_RegisterIndex) * 4;
102 i2c.y_data_reg = le16_to_cpu(gpio->usDataY_RegisterIndex) * 4;
103 i2c.a_clk_reg = le16_to_cpu(gpio->usClkA_RegisterIndex) * 4;
104 i2c.a_data_reg = le16_to_cpu(gpio->usDataA_RegisterIndex) * 4;
105 i2c.mask_clk_mask = (1 << gpio->ucClkMaskShift);
106 i2c.mask_data_mask = (1 << gpio->ucDataMaskShift);
107 i2c.en_clk_mask = (1 << gpio->ucClkEnShift);
108 i2c.en_data_mask = (1 << gpio->ucDataEnShift);
109 i2c.y_clk_mask = (1 << gpio->ucClkY_Shift);
110 i2c.y_data_mask = (1 << gpio->ucDataY_Shift);
111 i2c.a_clk_mask = (1 << gpio->ucClkA_Shift);
112 i2c.a_data_mask = (1 << gpio->ucDataA_Shift);
114 if (gpio->sucI2cId.sbfAccess.bfHW_Capable)
119 if (gpio->sucI2cId.ucAccess == 0xa0)
124 i2c.i2c_id = gpio->sucI2cId.ucAccess;
138 ATOM_GPIO_I2C_ASSIGMENT *gpio;
154 gpio = &i2c_info->asGPIO_Info[0];
157 radeon_lookup_i2c_gpio_quirks(rdev, gpio, i);
159 if (gpio->sucI2cId.ucAccess == id) {
160 i2c = radeon_get_bus_rec_for_i2c_gpio(gpio);
163 gpio = (ATOM_GPIO_I2C_ASSIGMENT *)
164 ((u8 *)gpio + sizeof(ATOM_GPIO_I2C_ASSIGMENT));
174 ATOM_GPIO_I2C_ASSIGMENT *gpio;
188 gpio = &i2c_info->asGPIO_Info[0];
190 radeon_lookup_i2c_gpio_quirks(rdev, gpio, i);
192 i2c = radeon_get_bus_rec_for_i2c_gpio(gpio);
198 gpio = (ATOM_GPIO_I2C_ASSIGMENT *)
199 ((u8 *)gpio + sizeof(ATOM_GPIO_I2C_ASSIGMENT));
208 struct radeon_gpio_rec gpio;
215 memset(&gpio, 0, sizeof(struct radeon_gpio_rec));
216 gpio.valid = false;
227 gpio.id = pin->ucGPIO_ID;
228 gpio.reg = le16_to_cpu(pin->usGpioPin_AIndex) * 4;
229 gpio.shift = pin->ucGpioPinBitShift;
230 gpio.mask = (1 << pin->ucGpioPinBitShift);
231 gpio.valid = true;
239 return gpio;
243 struct radeon_gpio_rec *gpio)
257 hpd.gpio = *gpio;
258 if (gpio->reg == reg) {
259 switch(gpio->mask) {
540 struct radeon_gpio_rec gpio;
753 /* look up gpio for ddc, hpd */
793 gpio = radeon_atombios_lookup_gpio(rdev,
795 hpd = radeon_atom_get_hpd_info_from_gpio(rdev, &gpio);
2156 rdev->pm.power_state[state_index].clock_info[0].voltage.gpio =
2192 rdev->pm.power_state[state_index].clock_info[0].voltage.gpio =
2228 rdev->pm.power_state[state_index].clock_info[0].voltage.gpio =
3784 ATOM_GPIO_VOLTAGE_OBJECT_V3 *gpio =
3787 if (gpio->ucGpioEntryNum > MAX_VOLTAGE_ENTRIES)
3789 lut = &gpio->asVolGpioLut[0];
3790 for (i = 0; i < gpio->ucGpioEntryNum; i++) {
3798 voltage_table->mask_low = le32_to_cpu(gpio->ulGpioMaskVal);
3799 voltage_table->count = gpio->ucGpioEntryNum;
3800 voltage_table->phase_delay = gpio->ucPhaseDelay;