Lines Matching defs:clock
1123 rdev->clock.vco_freq =
1135 struct radeon_pll *p1pll = &rdev->clock.p1pll;
1136 struct radeon_pll *p2pll = &rdev->clock.p2pll;
1137 struct radeon_pll *dcpll = &rdev->clock.dcpll;
1138 struct radeon_pll *spll = &rdev->clock.spll;
1139 struct radeon_pll *mpll = &rdev->clock.mpll;
1189 /* system clock */
1216 /* memory clock */
1243 rdev->clock.default_sclk =
1245 rdev->clock.default_mclk =
1249 rdev->clock.default_dispclk =
1251 if (rdev->clock.default_dispclk == 0) {
1253 rdev->clock.default_dispclk = 60000; /* 600 Mhz */
1255 rdev->clock.default_dispclk = 54000; /* 540 Mhz */
1257 rdev->clock.default_dispclk = 60000; /* 600 Mhz */
1260 if (ASIC_IS_DCE6(rdev) && (rdev->clock.default_dispclk < 53900)) {
1262 rdev->clock.default_dispclk / 100);
1263 rdev->clock.default_dispclk = 60000;
1265 rdev->clock.dp_extclk =
1267 rdev->clock.current_dispclk = rdev->clock.default_dispclk;
1271 rdev->clock.max_pixel_clock = le16_to_cpu(firmware_info->info.usMaxPixelClock);
1272 if (rdev->clock.max_pixel_clock == 0)
1273 rdev->clock.max_pixel_clock = 40000;
1275 /* not technically a clock, but... */
1280 rdev->clock.vco_freq =
1283 rdev->clock.vco_freq = rdev->clock.current_dispclk;
1287 rdev->clock.vco_freq = rdev->clock.current_dispclk;
1289 if (rdev->clock.vco_freq == 0)
1290 rdev->clock.vco_freq = 360000; /* 3.6 GHz */
1510 int id, u32 clock)
1544 (clock <= le32_to_cpu(ss_assign->v1.ulTargetClockRange))) {
1562 (clock <= le32_to_cpu(ss_assign->v2.ulTargetClockRange))) {
1584 (clock <= le32_to_cpu(ss_assign->v3.ulTargetClockRange))) {
1643 lvds->native_mode.clock =
1837 mode->crtc_clock = mode->clock =
1881 mode->crtc_clock = mode->clock =
2463 rdev->clock.default_mclk;
2465 rdev->clock.default_sclk;
2635 rdev->clock.default_mclk;
2637 rdev->clock.default_sclk;
2647 /* if multiple clock modes, mark the lowest as no display */
2731 rdev->clock.default_mclk;
2733 rdev->clock.default_sclk;
2744 /* if multiple clock modes, mark the lowest as no display */
2803 rdev->pm.power_state[state_index].clock_info[0].mclk = rdev->clock.default_mclk;
2804 rdev->pm.power_state[state_index].clock_info[0].sclk = rdev->clock.default_sclk;
2839 u32 clock,
2857 args.v1.ulClock = cpu_to_le32(clock); /* 10 khz */
2871 args.v2.ulClock = cpu_to_le32(clock); /* 10 khz */
2886 args.v3.ulClockParams = cpu_to_le32((clock_type << 24) | clock);
2904 args.v5.ulClockParams = cpu_to_le32((clock_type << 24) | clock);
2925 args.v4.ulClock = cpu_to_le32(clock); /* 10 khz */
2936 args.v6_in.ulClock.ulClockFreq = cpu_to_le32(clock); /* 10 khz */
2955 u32 clock,
2974 args.ulClock = cpu_to_le32(clock); /* 10 khz */