Lines Matching refs:PACKET3
2696 radeon_ring_write(ring, PACKET3(PACKET3_ME_INITIALIZE, 5));
2841 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
2879 radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));
2885 radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE_EOP, 4));
2893 radeon_ring_write(ring, PACKET3(PACKET3_SURFACE_SYNC, 3));
2898 radeon_ring_write(ring, PACKET3(PACKET3_EVENT_WRITE, 0));
2901 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
2905 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
2936 radeon_ring_write(ring, PACKET3(PACKET3_MEM_SEMAPHORE, 1));
2943 radeon_ring_write(ring, PACKET3(PACKET3_PFP_SYNC_ME, 0));
2990 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
3001 radeon_ring_write(ring, PACKET3(PACKET3_CP_DMA, 4));
3010 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
3376 radeon_ring_write(ring, PACKET3(PACKET3_SET_CONFIG_REG, 1));
3382 radeon_ring_write(ring, PACKET3(PACKET3_MEM_WRITE, 3));
3389 radeon_ring_write(ring, PACKET3(PACKET3_INDIRECT_BUFFER, 2));
3418 ib.ptr[0] = PACKET3(PACKET3_SET_CONFIG_REG, 1);