Lines Matching defs:speed_cntl
4494 u32 link_width_cntl, lanes, speed_cntl, training_cntl, tmp;
4518 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
4519 if (speed_cntl & LC_CURRENT_DATA_RATE) {
4547 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
4548 if ((speed_cntl & LC_OTHER_SIDE_EVER_SENT_GEN2) &&
4549 (speed_cntl & LC_OTHER_SIDE_SUPPORTS_GEN2)) {
4563 speed_cntl &= ~LC_SPEED_CHANGE_ATTEMPTS_ALLOWED_MASK;
4564 speed_cntl |= (0x3 << LC_SPEED_CHANGE_ATTEMPTS_ALLOWED_SHIFT);
4565 speed_cntl &= ~LC_VOLTAGE_TIMER_SEL_MASK;
4566 speed_cntl &= ~LC_FORCE_DIS_HW_SPEED_CHANGE;
4567 speed_cntl |= LC_FORCE_EN_HW_SPEED_CHANGE;
4568 WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
4586 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
4587 speed_cntl &= ~LC_TARGET_LINK_SPEED_OVERRIDE_EN;
4588 WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);
4591 speed_cntl = RREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL);
4592 speed_cntl |= LC_GEN2_EN_STRAP;
4593 WREG32_PCIE_PORT(PCIE_LC_SPEED_CNTL, speed_cntl);