Lines Matching refs:RREG32_PCIE
95 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL);
97 (void)RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL);
181 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL);
201 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL);
539 link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL);
555 link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL);
557 link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL);
573 link_width_cntl = RREG32_PCIE(RADEON_PCIE_LC_LINK_WIDTH_CNTL);
600 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_CNTL);
602 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_BASE);
604 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_START_LO);
606 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_START_HI);
608 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_END_LO);
610 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_END_HI);
612 tmp = RREG32_PCIE(RADEON_PCIE_TX_GART_ERROR);