Lines Matching refs:PACKET0
222 radeon_ring_write(ring, PACKET0(R300_RE_SCISSORS_TL, 0));
224 radeon_ring_write(ring, PACKET0(R300_RE_SCISSORS_BR, 0));
227 radeon_ring_write(ring, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
229 radeon_ring_write(ring, PACKET0(R300_RB3D_ZCACHE_CTLSTAT, 0));
232 radeon_ring_write(ring, PACKET0(RADEON_WAIT_UNTIL, 0));
236 radeon_ring_write(ring, PACKET0(RADEON_HOST_PATH_CNTL, 0));
239 radeon_ring_write(ring, PACKET0(RADEON_HOST_PATH_CNTL, 0));
242 radeon_ring_write(ring, PACKET0(rdev->fence_drv[fence->ring].scratch_reg, 0));
244 radeon_ring_write(ring, PACKET0(RADEON_GEN_INT_STATUS, 0));
275 radeon_ring_write(ring, PACKET0(RADEON_ISYNC_CNTL, 0));
281 radeon_ring_write(ring, PACKET0(R300_GB_TILE_CONFIG, 0));
283 radeon_ring_write(ring, PACKET0(RADEON_WAIT_UNTIL, 0));
287 radeon_ring_write(ring, PACKET0(R300_DST_PIPE_CONFIG, 0));
289 radeon_ring_write(ring, PACKET0(R300_GB_SELECT, 0));
291 radeon_ring_write(ring, PACKET0(R300_GB_ENABLE, 0));
293 radeon_ring_write(ring, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
295 radeon_ring_write(ring, PACKET0(R300_RB3D_ZCACHE_CTLSTAT, 0));
297 radeon_ring_write(ring, PACKET0(RADEON_WAIT_UNTIL, 0));
301 radeon_ring_write(ring, PACKET0(R300_GB_AA_CONFIG, 0));
303 radeon_ring_write(ring, PACKET0(R300_RB3D_DSTCACHE_CTLSTAT, 0));
305 radeon_ring_write(ring, PACKET0(R300_RB3D_ZCACHE_CTLSTAT, 0));
307 radeon_ring_write(ring, PACKET0(R300_GB_MSPOS0, 0));
317 radeon_ring_write(ring, PACKET0(R300_GB_MSPOS1, 0));
326 radeon_ring_write(ring, PACKET0(R300_GA_ENHANCE, 0));
328 radeon_ring_write(ring, PACKET0(R300_GA_POLY_MODE, 0));
331 radeon_ring_write(ring, PACKET0(R300_GA_ROUND_MODE, 0));