Lines Matching refs:robj
1222 track->db_z_read_bo = reloc->robj;
1234 track->db_z_write_bo = reloc->robj;
1246 track->db_s_read_bo = reloc->robj;
1258 track->db_s_write_bo = reloc->robj;
1282 track->vgt_strmout_bo[tmp] = reloc->robj;
1506 track->cb_color_fmask_bo[tmp] = reloc->robj;
1523 track->cb_color_cmask_bo[tmp] = reloc->robj;
1564 track->cb_color_bo[tmp] = reloc->robj;
1580 track->cb_color_bo[tmp] = reloc->robj;
1592 track->htile_bo = reloc->robj;
2023 track->indirect_draw_buffer_size = radeon_bo_size(reloc->robj);
2160 if ((tmp + size) > radeon_bo_size(reloc->robj)) {
2162 tmp + size, radeon_bo_size(reloc->robj));
2198 if ((tmp + size) > radeon_bo_size(reloc->robj)) {
2200 tmp + size, radeon_bo_size(reloc->robj));
2377 texture = reloc->robj;
2398 mipmap = reloc->robj;
2418 if (p->rdev && (size + offset) > radeon_bo_size(reloc->robj)) {
2421 ib[idx+1+(i*8)+1] = radeon_bo_size(reloc->robj) - offset;
2500 if ((offset + 4) > radeon_bo_size(reloc->robj)) {
2502 offset + 4, radeon_bo_size(reloc->robj));
2519 if ((offset + 4) > radeon_bo_size(reloc->robj)) {
2521 offset + 4, radeon_bo_size(reloc->robj));
2548 if ((offset + 8) > radeon_bo_size(reloc->robj)) {
2550 offset + 8, radeon_bo_size(reloc->robj));
2573 if ((offset + 4) > radeon_bo_size(reloc->robj)) {
2575 offset + 4, radeon_bo_size(reloc->robj));
2600 if ((offset + 4) > radeon_bo_size(reloc->robj)) {
2602 offset + 4, radeon_bo_size(reloc->robj));
2848 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) {
2850 dst_offset, radeon_bo_size(dst_reloc->robj));
2873 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) {
2875 src_offset + (count * 4), radeon_bo_size(src_reloc->robj));
2878 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) {
2880 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj));
2913 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) {
2915 src_offset + (count * 4), radeon_bo_size(src_reloc->robj));
2918 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) {
2920 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj));
2932 if ((src_offset + count) > radeon_bo_size(src_reloc->robj)) {
2934 src_offset + count, radeon_bo_size(src_reloc->robj));
2937 if ((dst_offset + count) > radeon_bo_size(dst_reloc->robj)) {
2939 dst_offset + count, radeon_bo_size(dst_reloc->robj));
2976 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) {
2978 src_offset + (count * 4), radeon_bo_size(src_reloc->robj));
2981 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) {
2983 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj));
2986 if ((dst2_offset + (count * 4)) > radeon_bo_size(dst2_reloc->robj)) {
2988 dst2_offset + (count * 4), radeon_bo_size(dst2_reloc->robj));
3016 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) {
3018 src_offset + (count * 4), radeon_bo_size(src_reloc->robj));
3021 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) {
3023 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj));
3026 if ((dst2_offset + (count * 4)) > radeon_bo_size(dst2_reloc->robj)) {
3028 dst2_offset + (count * 4), radeon_bo_size(dst2_reloc->robj));
3078 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) {
3080 src_offset + (count * 4), radeon_bo_size(src_reloc->robj));
3083 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) {
3085 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj));
3088 if ((dst2_offset + (count * 4)) > radeon_bo_size(dst2_reloc->robj)) {
3090 dst2_offset + (count * 4), radeon_bo_size(dst2_reloc->robj));
3124 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) {
3126 src_offset + (count * 4), radeon_bo_size(src_reloc->robj));
3129 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) {
3131 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj));
3165 if ((src_offset + (count * 4)) > radeon_bo_size(src_reloc->robj)) {
3167 src_offset + (count * 4), radeon_bo_size(src_reloc->robj));
3170 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) {
3172 dst_offset + (count * 4), radeon_bo_size(dst_reloc->robj));
3175 if ((dst2_offset + (count * 4)) > radeon_bo_size(dst2_reloc->robj)) {
3177 dst2_offset + (count * 4), radeon_bo_size(dst2_reloc->robj));
3199 if ((dst_offset + (count * 4)) > radeon_bo_size(dst_reloc->robj)) {
3201 dst_offset, radeon_bo_size(dst_reloc->robj));