Lines Matching refs:reg
49 u32 eg_cg_rreg(struct radeon_device *rdev, u32 reg)
55 WREG32(EVERGREEN_CG_IND_ADDR, ((reg) & 0xffff));
61 void eg_cg_wreg(struct radeon_device *rdev, u32 reg, u32 v)
66 WREG32(EVERGREEN_CG_IND_ADDR, ((reg) & 0xffff));
71 u32 eg_pif_phy0_rreg(struct radeon_device *rdev, u32 reg)
77 WREG32(EVERGREEN_PIF_PHY0_INDEX, ((reg) & 0xffff));
83 void eg_pif_phy0_wreg(struct radeon_device *rdev, u32 reg, u32 v)
88 WREG32(EVERGREEN_PIF_PHY0_INDEX, ((reg) & 0xffff));
93 u32 eg_pif_phy1_rreg(struct radeon_device *rdev, u32 reg)
99 WREG32(EVERGREEN_PIF_PHY1_INDEX, ((reg) & 0xffff));
105 void eg_pif_phy1_wreg(struct radeon_device *rdev, u32 reg, u32 v)
110 WREG32(EVERGREEN_PIF_PHY1_INDEX, ((reg) & 0xffff));
1090 * @reg: register offset in bytes
1097 u32 reg, u32 *val)
1099 switch (reg) {
1107 *val = RREG32(reg);