Lines Matching refs:crtc_offsets
115 static const u32 crtc_offsets[6] =
1353 if (RREG32(EVERGREEN_CRTC_STATUS + crtc_offsets[crtc]) & EVERGREEN_CRTC_V_BLANK)
1363 pos1 = RREG32(EVERGREEN_CRTC_STATUS_POSITION + crtc_offsets[crtc]);
1364 pos2 = RREG32(EVERGREEN_CRTC_STATUS_POSITION + crtc_offsets[crtc]);
1387 if (!(RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[crtc]) & EVERGREEN_CRTC_MASTER_EN))
2679 crtc_enabled = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]) & EVERGREEN_CRTC_MASTER_EN;
2683 tmp = RREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i]);
2686 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);
2688 WREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i], tmp);
2689 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);
2692 tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);
2695 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);
2697 WREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i], tmp);
2698 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);
2720 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);
2721 tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);
2723 WREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i], tmp);
2724 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);
2748 tmp = RREG32(EVERGREEN_GRPH_UPDATE + crtc_offsets[i]);
2751 WREG32(EVERGREEN_GRPH_UPDATE + crtc_offsets[i], tmp);
2753 tmp = RREG32(EVERGREEN_MASTER_UPDATE_LOCK + crtc_offsets[i]);
2756 WREG32(EVERGREEN_MASTER_UPDATE_LOCK + crtc_offsets[i], tmp);
2769 WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS_HIGH + crtc_offsets[i],
2771 WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS_HIGH + crtc_offsets[i],
2773 WREG32(EVERGREEN_GRPH_PRIMARY_SURFACE_ADDRESS + crtc_offsets[i],
2775 WREG32(EVERGREEN_GRPH_SECONDARY_SURFACE_ADDRESS + crtc_offsets[i],
2787 tmp = RREG32(EVERGREEN_MASTER_UPDATE_MODE + crtc_offsets[i]);
2790 WREG32(EVERGREEN_MASTER_UPDATE_MODE + crtc_offsets[i], tmp);
2792 tmp = RREG32(EVERGREEN_GRPH_UPDATE + crtc_offsets[i]);
2795 WREG32(EVERGREEN_GRPH_UPDATE + crtc_offsets[i], tmp);
2797 tmp = RREG32(EVERGREEN_MASTER_UPDATE_LOCK + crtc_offsets[i]);
2800 WREG32(EVERGREEN_MASTER_UPDATE_LOCK + crtc_offsets[i], tmp);
2803 tmp = RREG32(EVERGREEN_GRPH_UPDATE + crtc_offsets[i]);
2821 tmp = RREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i]);
2823 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);
2824 WREG32(EVERGREEN_CRTC_BLANK_CONTROL + crtc_offsets[i], tmp);
2825 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);
2827 tmp = RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]);
2829 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 1);
2830 WREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i], tmp);
2831 WREG32(EVERGREEN_CRTC_UPDATE_LOCK + crtc_offsets[i], 0);
3804 if (RREG32(EVERGREEN_CRTC_CONTROL + crtc_offsets[i]) & EVERGREEN_CRTC_MASTER_EN) {
3805 crtc_status[i] = RREG32(EVERGREEN_CRTC_STATUS_HV_COUNT + crtc_offsets[i]);
3813 tmp = RREG32(EVERGREEN_CRTC_STATUS_HV_COUNT + crtc_offsets[i]);
4455 return RREG32(CRTC_STATUS_FRAME_COUNT + crtc_offsets[crtc]);
4477 WREG32(INT_MASK + crtc_offsets[i], 0);
4479 WREG32(GRPH_INT_CONTROL + crtc_offsets[i], 0);
4577 rdev, INT_MASK + crtc_offsets[i],
4584 WREG32(GRPH_INT_CONTROL + crtc_offsets[i], GRPH_PFLIP_INT_MASK);
4600 rdev, AFMT_AUDIO_PACKET_CONTROL + crtc_offsets[i],
4621 afmt_status[i] = RREG32(AFMT_STATUS + crtc_offsets[i]);
4623 grph_int[i] = RREG32(GRPH_INT_STATUS + crtc_offsets[i]);
4630 WREG32(GRPH_INT_STATUS + crtc_offsets[j],
4636 WREG32(VBLANK_STATUS + crtc_offsets[j],
4639 WREG32(VLINE_STATUS + crtc_offsets[j],
4656 WREG32_OR(AFMT_AUDIO_PACKET_CONTROL + crtc_offsets[i],