Lines Matching defs:table
405 struct atom_voltage_table *table,
410 for (i = 0; i < table->count; i++) {
411 if (value <= table->entries[i].value) {
413 voltage->value = cpu_to_be16(table->entries[i].value);
418 if (i == table->count)
1241 RV770_SMC_STATETABLE *table)
1248 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL =
1250 table->initialState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 =
1252 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL =
1254 table->initialState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 =
1256 table->initialState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL =
1258 table->initialState.levels[0].mclk.mclk770.vDLL_CNTL =
1261 table->initialState.levels[0].mclk.mclk770.vMPLL_SS =
1263 table->initialState.levels[0].mclk.mclk770.vMPLL_SS2 =
1266 table->initialState.levels[0].mclk.mclk770.mclk_value =
1269 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL =
1271 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 =
1273 table->initialState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 =
1275 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM =
1277 table->initialState.levels[0].sclk.vCG_SPLL_SPREAD_SPECTRUM_2 =
1280 table->initialState.levels[0].sclk.sclk_value =
1283 table->initialState.levels[0].arbValue = MC_CG_ARB_FREQ_F0;
1285 table->initialState.levels[0].ACIndex = 0;
1290 &table->initialState.levels[0].vddc);
1296 &table->initialState.levels[0].vddci);
1299 &table->initialState.levels[0].mvdd);
1302 table->initialState.levels[0].aT = cpu_to_be32(a_t);
1304 table->initialState.levels[0].bSP = cpu_to_be32(pi->dsp);
1308 table->initialState.levels[0].gen2PCIE = 1;
1310 table->initialState.levels[0].gen2PCIE = 0;
1312 table->initialState.levels[0].gen2XSP = 1;
1314 table->initialState.levels[0].gen2XSP = 0;
1317 table->initialState.levels[0].strobeMode =
1322 table->initialState.levels[0].mcFlags = SMC_MC_EDC_RD_FLAG | SMC_MC_EDC_WR_FLAG;
1324 table->initialState.levels[0].mcFlags = 0;
1327 table->initialState.levels[1] = table->initialState.levels[0];
1328 table->initialState.levels[2] = table->initialState.levels[0];
1330 table->initialState.flags |= PPSMC_SWSTATE_FLAG_DC;
1336 RV770_SMC_STATETABLE *table)
1359 table->ACPIState = table->initialState;
1361 table->ACPIState.flags &= ~PPSMC_SWSTATE_FLAG_DC;
1367 &table->ACPIState.levels[0].vddc);
1370 table->ACPIState.levels[0].gen2PCIE = 1;
1372 table->ACPIState.levels[0].gen2PCIE = 0;
1374 table->ACPIState.levels[0].gen2PCIE = 0;
1376 table->ACPIState.levels[0].gen2XSP = 1;
1378 table->ACPIState.levels[0].gen2XSP = 0;
1383 &table->ACPIState.levels[0].vddc);
1384 table->ACPIState.levels[0].gen2PCIE = 0;
1392 &table->ACPIState.levels[0].vddci);
1438 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL =
1440 table->ACPIState.levels[0].mclk.mclk770.vMPLL_AD_FUNC_CNTL_2 =
1442 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL =
1444 table->ACPIState.levels[0].mclk.mclk770.vMPLL_DQ_FUNC_CNTL_2 =
1446 table->ACPIState.levels[0].mclk.mclk770.vMCLK_PWRMGT_CNTL =
1448 table->ACPIState.levels[0].mclk.mclk770.vDLL_CNTL = cpu_to_be32(dll_cntl);
1450 table->ACPIState.levels[0].mclk.mclk770.mclk_value = 0;
1452 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL =
1454 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_2 =
1456 table->ACPIState.levels[0].sclk.vCG_SPLL_FUNC_CNTL_3 =
1459 table->ACPIState.levels[0].sclk.sclk_value = 0;
1461 cypress_populate_mvdd_value(rdev, 0, &table->ACPIState.levels[0].mvdd);
1464 table->ACPIState.levels[0].ACIndex = 1;
1466 table->ACPIState.levels[1] = table->ACPIState.levels[0];
1467 table->ACPIState.levels[2] = table->ACPIState.levels[0];
1518 RV770_SMC_STATETABLE *table)
1523 table->highSMIO[i] = 0;
1524 table->lowSMIO[i] |= cpu_to_be32(voltage_table->entries[i].smio_low);
1529 RV770_SMC_STATETABLE *table)
1538 table);
1540 table->voltageMaskTable.highMask[RV770_SMC_VOLTAGEMASK_VDDC] = 0;
1541 table->voltageMaskTable.lowMask[RV770_SMC_VOLTAGEMASK_VDDC] =
1547 table->maxVDDCIndexInPPTable = i;
1556 table);
1558 table->voltageMaskTable.highMask[RV770_SMC_VOLTAGEMASK_VDDCI] = 0;
1559 table->voltageMaskTable.lowMask[RV770_SMC_VOLTAGEMASK_VDDCI] =
1620 RV770_SMC_STATETABLE *table = &pi->smc_statetable;
1623 memset(table, 0, sizeof(RV770_SMC_STATETABLE));
1625 cypress_populate_smc_voltage_tables(rdev, table);
1630 table->thermalProtectType = PPSMC_THERMAL_PROTECT_TYPE_INTERNAL;
1633 table->thermalProtectType = PPSMC_THERMAL_PROTECT_TYPE_NONE;
1636 table->thermalProtectType = PPSMC_THERMAL_PROTECT_TYPE_EXTERNAL;
1641 table->systemFlags |= PPSMC_SYSTEMFLAG_GPIO_DC;
1644 table->systemFlags |= PPSMC_SYSTEMFLAG_REGULATOR_HOT;
1647 table->systemFlags |= PPSMC_SYSTEMFLAG_STEPVDDC;
1650 table->systemFlags |= PPSMC_SYSTEMFLAG_GDDR5;
1652 ret = cypress_populate_smc_initial_state(rdev, radeon_boot_state, table);
1656 ret = cypress_populate_smc_acpi_state(rdev, table);
1660 table->driverState = table->initialState;
1664 (u8 *)table, sizeof(RV770_SMC_STATETABLE),