Lines Matching defs:scratch
3420 * GPU scratch registers helpers function.
3423 * cik_scratch_init - setup driver info for CP scratch regs
3427 * Set up the number and offset of the CP scratch registers.
3428 * NOTE: use of CP scratch registers is a legacy inferface and
3430 * memory buffers are used for fences rather than scratch regs.
3436 rdev->scratch.num_reg = 7;
3437 rdev->scratch.reg_base = SCRATCH_REG0;
3438 for (i = 0; i < rdev->scratch.num_reg; i++) {
3439 rdev->scratch.free[i] = true;
3440 rdev->scratch.reg[i] = rdev->scratch.reg_base + (i * 4);
3450 * Allocate a scratch register and write to it using the gfx ring (CIK).
3457 uint32_t scratch;
3462 r = radeon_scratch_get(rdev, &scratch);
3464 DRM_ERROR("radeon: cp failed to get scratch reg (%d).\n", r);
3467 WREG32(scratch, 0xCAFEDEAD);
3471 radeon_scratch_free(rdev, scratch);
3475 radeon_ring_write(ring, ((scratch - PACKET3_SET_UCONFIG_REG_START) >> 2));
3480 tmp = RREG32(scratch);
3488 DRM_ERROR("radeon: ring %d test failed (scratch(0x%04X)=0x%08X)\n",
3489 ring->idx, scratch, tmp);
3492 radeon_scratch_free(rdev, scratch);
3782 uint32_t scratch;
3787 r = radeon_scratch_get(rdev, &scratch);
3789 DRM_ERROR("radeon: failed to get scratch reg (%d).\n", r);
3792 WREG32(scratch, 0xCAFEDEAD);
3796 radeon_scratch_free(rdev, scratch);
3800 ib.ptr[1] = ((scratch - PACKET3_SET_UCONFIG_REG_START) >> 2);
3805 radeon_scratch_free(rdev, scratch);
3814 radeon_scratch_free(rdev, scratch);
3819 radeon_scratch_free(rdev, scratch);
3825 tmp = RREG32(scratch);
3833 DRM_ERROR("radeon: ib test failed (scratch(0x%04X)=0x%08X)\n",
3834 scratch, tmp);
3837 radeon_scratch_free(rdev, scratch);
4095 /* scratch register shadowing is no longer supported */
5512 /* where to put LDS, scratch, GPUVM in FSA64 space */
8303 /* scratch needs to be initialized before MC */
8595 /* Initialize scratch registers */