Lines Matching defs:buffer
3614 * @ring: radeon ring buffer object
3721 * @ib: radeon indirect buffer object
3736 /* set switch buffer packet before const IB */
3853 * The CE is an asynchronous engine used for updating buffer desciptors
4048 * cik_cp_gfx_resume - setup the gfx ring buffer registers
4052 * Program the location and size of the gfx ring buffer
4077 /* Set ring buffer size */
4086 /* Initialize the ring buffer's read and write pointers */
5597 * @ib: indirect buffer pointer
6434 /* write the cp table buffer */
6710 void cik_get_csb_buffer(struct radeon_device *rdev, volatile u32 *buffer)
6718 if (buffer == NULL)
6721 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));
6722 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_BEGIN_CLEAR_STATE);
6724 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CONTEXT_CONTROL, 1));
6725 buffer[count++] = cpu_to_le32(0x80000000);
6726 buffer[count++] = cpu_to_le32(0x80000000);
6731 buffer[count++] =
6733 buffer[count++] = cpu_to_le32(ext->reg_index - 0xa000);
6735 buffer[count++] = cpu_to_le32(ext->extent[i]);
6742 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_SET_CONTEXT_REG, 2));
6743 buffer[count++] = cpu_to_le32(PA_SC_RASTER_CONFIG - PACKET3_SET_CONTEXT_REG_START);
6746 buffer[count++] = cpu_to_le32(0x16000012);
6747 buffer[count++] = cpu_to_le32(0x00000000);
6750 buffer[count++] = cpu_to_le32(0x00000000); /* XXX */
6751 buffer[count++] = cpu_to_le32(0x00000000);
6755 buffer[count++] = cpu_to_le32(0x00000000); /* XXX */
6756 buffer[count++] = cpu_to_le32(0x00000000);
6759 buffer[count++] = cpu_to_le32(0x3a00161a);
6760 buffer[count++] = cpu_to_le32(0x0000002e);
6763 buffer[count++] = cpu_to_le32(0x00000000);
6764 buffer[count++] = cpu_to_le32(0x00000000);
6768 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_PREAMBLE_CNTL, 0));
6769 buffer[count++] = cpu_to_le32(PACKET3_PREAMBLE_END_CLEAR_STATE);
6771 buffer[count++] = cpu_to_le32(PACKET3(PACKET3_CLEAR_STATE, 0));
6772 buffer[count++] = cpu_to_le32(0);
6803 * Starting with r6xx, interrupts are handled via a ring buffer.
6810 * writes vectors to the ring buffer, it increments the
6817 * cik_enable_interrupts - Enable the interrupt ring buffer
6821 * Enable the interrupt ring buffer (CIK).
6836 * cik_disable_interrupts - Disable the interrupt ring buffer
6840 * Disable the interrupt ring buffer (CIK).
6940 * Allocate a ring buffer for the interrupt controller,
6942 * ring buffer and enable it (CIK).
7472 * buffer (CIK).
7482 * cik_get_ih_wptr - get the IH ring buffer wptr
7486 * Get the IH ring buffer wptr from either the register
7487 * or the writeback memory buffer (CIK). Also check for
7488 * ring buffer overflow and deal with it.
7503 /* When a ring buffer overflow happen start parsing interrupt
7507 dev_warn(rdev->dev, "IH ring buffer overflow (0x%08X, 0x%08X, 0x%08X)\n",
8344 /* allocate wb buffer */
8807 * dce8_line_buffer_adjust - Set up the line buffer
8814 * Setup up the line buffer allocation for
8816 * Returns the line buffer size in pixels.
8928 u32 lb_size; /* line buffer allocated to pipe */
9241 * @lb_size: line buffer size
9381 * buffer allocation (CIK).