Lines Matching refs:x00
518 #define COMPUTE_GPUCLK_INPUT_FLAG_DEFAULT_GPUCLK 0x00
717 #define ATOM_ENCODER_CONFIG_DPLINKRATE_1_62GHZ 0x00
721 #define ATOM_ENCODER_CONFIG_LINKA 0x00
726 #define ATOM_ENCODER_CONFIG_UNIPHY 0x00
728 #define ATOM_ENCODER_CONFIG_TRANSMITTER1 0x00
785 #define ATOM_ENCODER_CONFIG_V2_DPLINKRATE_1_62GHZ 0x00
788 #define ATOM_ENCODER_CONFIG_V2_LINKA 0x00
791 #define ATOM_ENCODER_CONFIG_V2_TRANSMITTER1 0x00
811 #define ATOM_ENCODER_STATUS_LINK_TRAINING_INCOMPLETE 0x00
832 #define ATOM_ENCODER_CONFIG_V3_DPLINKRATE_1_62GHZ 0x00
835 #define ATOM_ENCODER_CONFIG_V3_DIG0_ENCODER 0x00
885 #define ATOM_ENCODER_CONFIG_V4_DPLINKRATE_1_62GHZ 0x00
890 #define ATOM_ENCODER_CONFIG_V4_DIG0_ENCODER 0x00
925 #define PANEL_BPC_UNDEFINE 0x00
933 #define DP_PANEL_MODE_EXTERNAL_DP_MODE 0x00
984 #define ATOM_TRANSMITTER_CONFIG_LINKA 0x00
986 #define ATOM_TRANSMITTER_CONFIG_LINKA_B 0x00
990 #define ATOM_TRANSMITTER_CONFIG_DIG1_ENCODER 0x00 // only used when ATOM_TRANSMITTER_ACTION_ENABLE
994 #define ATOM_TRANSMITTER_CONFIG_CLKSRC_PPLL 0x00
998 #define ATOM_TRANSMITTER_CONFIG_LANE_0_3 0x00
999 #define ATOM_TRANSMITTER_CONFIG_LANE_0_7 0x00
1059 #define ATOM_TRANSMITTER_CONFIG_V2_LINKA 0x00
1064 #define ATOM_TRANSMITTER_CONFIG_V2_DIG1_ENCODER 0x00 // only used when ucAction == ATOM_TRANSMITTER_ACTION_ENABLE or ATOM_TRANSMITTER_ACTION_SETUP
1072 #define ATOM_TRANSMITTER_CONFIG_V2_TRANSMITTER1 0x00 //AB
1138 #define ATOM_TRANSMITTER_CONFIG_V3_LINKA 0x00
1143 #define ATOM_TRANSMITTER_CONFIG_V3_DIG1_ENCODER 0x00
1148 #define ATOM_TRASMITTER_CONFIG_V3_P1PLL 0x00
1154 #define ATOM_TRANSMITTER_CONFIG_V3_TRANSMITTER1 0x00 //AB
1235 #define ATOM_TRANSMITTER_CONFIG_V4_LINKA 0x00
1239 #define ATOM_TRANSMITTER_CONFIG_V4_DIG1_ENCODER 0x00
1243 #define ATOM_TRANSMITTER_CONFIG_V4_P1PLL 0x00
1249 #define ATOM_TRANSMITTER_CONFIG_V4_TRANSMITTER1 0x00 //AB
1316 #define DP_LANE_SET__0DB_0_4V 0x00
1335 #define ATOM_TRANSMITTER_CONFIG_V5_P1PLL 0x00
1343 #define ATOM_TRANSMITTER_CONFIG_V5_NO_HPD_SEL 0x00
1376 #define EXTERNAL_ENCODER_ACTION_V3_DISABLE_OUTPUT 0x00
1387 #define EXTERNAL_ENCODER_CONFIG_V3_DPLINKRATE_1_62GHZ 0x00
1391 #define EXTERNAL_ENCODER_CONFIG_V3_ENCODER1 0x00
1518 //#define ASIC_INT_DAC1_ENCODER_ID 0x00
1589 //#define DVO_ENCODER_CONFIG_DDR_SPEED 0x00
1592 //#define DVO_ENCODER_CONFIG_LOW12BIT 0x00
1600 #define PIXEL_CLOCK_MISC_CRTC_SEL_CRTC1 0x00
1664 #define PIXEL_CLOCK_V5_MISC_HDMI_24BPP 0x00
1712 #define PIXEL_CLOCK_V6_MISC_HDMI_24BPP 0x00
1947 #define ATOM_PPLL_SS_TYPE_V2_DOWN_SPREAD 0x00
1951 #define ATOM_PPLL_SS_TYPE_V2_P1PLL 0x00
1972 #define ATOM_PPLL_SS_TYPE_V3_DOWN_SPREAD 0x00
1976 #define ATOM_PPLL_SS_TYPE_V3_P1PLL 0x00
2120 #define DVO_ENCODER_CONFIG_DDR_SPEED 0x00
2123 #define DVO_ENCODER_CONFIG_LOW12BIT 0x00
2184 #define PANEL_ENCODER_25FRC_E 0x00
2187 #define PANEL_ENCODER_50FRC_A 0x00
2192 #define PANEL_ENCODER_75FRC_E 0x00
2292 #define ATOM_GET_VOLTAGE_VID 0x00
2736 #define REMOTE_DISPLAY_DISABLE 0x00
2796 ucMinNBVoltage: Voltage regulator dependent PWM value. Low 8 bits of the value for the min voltage.Set this one to 0x00 if VC without PWM or no VC at all.
2802 ucMinNBVoltageHigh: Voltage regulator dependent PWM value. High 8 bits of the value for the min voltage.Set this one to 0x00 if VC without PWM or no VC at all.
3042 #define ASIC_INT_DAC1_ENCODER_ID 0x00
3063 #define ATOM_ENCODER_ENUM_ID1 0x00
3585 #define eDP_TO_LVDS_RX_DISABLE 0x00 // no eDP->LVDS translator chip
4300 #define GPIO_PIN_TYPE_INPUT 0x00
4510 #define VOLTAGE_CONTROLLED_BY_HW 0x00
4761 #define POWERSOURCE_PCIE_ID1 0x00
4768 #define POWER_SENSOR_ALWAYS 0x00
5904 #define ATOM_S7_DOS_MODE_VGAb0 0x00
6015 #define GPIO_PIN_READ 0x00
6175 #define INDIRECT_READ 0x00
6962 #define ATOM_BIOS_FUNCTION_COP_MODE 0x00
7024 #define ASIC_TRANSMITTER_INFO_CONFIG__ENCODER_A 0x00
7175 #define ATOM_DP_CONFIG_DIG1_ENCODER 0x00
7179 #define ATOM_DP_CONFIG_LINK_A 0x00