Lines Matching defs:pfdev
24 struct panfrost_device *pfdev = data;
25 u32 state = gpu_read(pfdev, GPU_INT_STAT);
26 u32 fault_status = gpu_read(pfdev, GPU_FAULT_STATUS);
32 u64 address = (u64) gpu_read(pfdev, GPU_FAULT_ADDRESS_HI) << 32;
33 address |= gpu_read(pfdev, GPU_FAULT_ADDRESS_LO);
35 dev_warn(pfdev->dev, "GPU Fault 0x%08x (%s) at 0x%016llx\n",
36 fault_status & 0xFF, panfrost_exception_name(pfdev, fault_status),
40 dev_warn(pfdev->dev, "There were multiple GPU faults - some have not been reported\n");
42 gpu_write(pfdev, GPU_INT_MASK, 0);
46 panfrost_perfcnt_sample_done(pfdev);
49 panfrost_perfcnt_clean_cache_done(pfdev);
51 gpu_write(pfdev, GPU_INT_CLEAR, state);
56 int panfrost_gpu_soft_reset(struct panfrost_device *pfdev)
61 gpu_write(pfdev, GPU_INT_MASK, 0);
62 gpu_write(pfdev, GPU_INT_CLEAR, GPU_IRQ_RESET_COMPLETED);
63 gpu_write(pfdev, GPU_CMD, GPU_CMD_SOFT_RESET);
65 ret = readl_relaxed_poll_timeout(pfdev->iomem + GPU_INT_RAWSTAT,
69 dev_err(pfdev->dev, "gpu soft reset timed out\n");
73 gpu_write(pfdev, GPU_INT_CLEAR, GPU_IRQ_MASK_ALL);
74 gpu_write(pfdev, GPU_INT_MASK, GPU_IRQ_MASK_ALL);
79 void panfrost_gpu_amlogic_quirk(struct panfrost_device *pfdev)
86 gpu_write(pfdev, GPU_PWR_KEY, GPU_PWR_KEY_UNLOCK);
87 gpu_write(pfdev, GPU_PWR_OVERRIDE1, 0xfff | (0x20 << 16));
90 static void panfrost_gpu_init_quirks(struct panfrost_device *pfdev)
94 if (panfrost_has_hw_issue(pfdev, HW_ISSUE_8443) ||
95 panfrost_has_hw_issue(pfdev, HW_ISSUE_11035))
98 if (panfrost_has_hw_issue(pfdev, HW_ISSUE_10327))
101 if (panfrost_has_hw_issue(pfdev, HW_ISSUE_10797))
104 if (!panfrost_has_hw_issue(pfdev, GPUCORE_1619)) {
105 if (panfrost_model_cmp(pfdev, 0x750) < 0) /* T60x, T62x, T72x */
107 else if (panfrost_model_cmp(pfdev, 0x880) <= 0) /* T76x, T8xx */
111 if (panfrost_has_hw_feature(pfdev, HW_FEATURE_TLS_HASHING))
115 gpu_write(pfdev, GPU_SHADER_CONFIG, quirks);
118 quirks = gpu_read(pfdev, GPU_TILER_CONFIG);
121 if (panfrost_has_hw_issue(pfdev, HW_ISSUE_T76X_3953))
124 gpu_write(pfdev, GPU_TILER_CONFIG, quirks);
127 quirks = gpu_read(pfdev, GPU_L2_MMU_CONFIG);
130 if (panfrost_has_hw_feature(pfdev, HW_FEATURE_3BIT_EXT_RW_L2_MMU_CONFIG))
137 gpu_write(pfdev, GPU_L2_MMU_CONFIG, quirks);
140 if ((panfrost_model_eq(pfdev, 0x860) || panfrost_model_eq(pfdev, 0x880)) &&
141 pfdev->features.revision >= 0x2000)
143 else if (panfrost_model_eq(pfdev, 0x6000) &&
144 pfdev->features.coherency_features == COHERENCY_ACE)
149 gpu_write(pfdev, GPU_JM_CONFIG, quirks);
152 if (pfdev->comp->vendor_quirk)
153 pfdev->comp->vendor_quirk(pfdev);
212 static void panfrost_gpu_init_features(struct panfrost_device *pfdev)
221 pfdev->features.l2_features = gpu_read(pfdev, GPU_L2_FEATURES);
222 pfdev->features.core_features = gpu_read(pfdev, GPU_CORE_FEATURES);
223 pfdev->features.tiler_features = gpu_read(pfdev, GPU_TILER_FEATURES);
224 pfdev->features.mem_features = gpu_read(pfdev, GPU_MEM_FEATURES);
225 pfdev->features.mmu_features = gpu_read(pfdev, GPU_MMU_FEATURES);
226 pfdev->features.thread_features = gpu_read(pfdev, GPU_THREAD_FEATURES);
227 pfdev->features.max_threads = gpu_read(pfdev, GPU_THREAD_MAX_THREADS);
228 pfdev->features.thread_max_workgroup_sz = gpu_read(pfdev, GPU_THREAD_MAX_WORKGROUP_SIZE);
229 pfdev->features.thread_max_barrier_sz = gpu_read(pfdev, GPU_THREAD_MAX_BARRIER_SIZE);
230 pfdev->features.coherency_features = gpu_read(pfdev, GPU_COHERENCY_FEATURES);
232 pfdev->features.texture_features[i] = gpu_read(pfdev, GPU_TEXTURE_FEATURES(i));
234 pfdev->features.as_present = gpu_read(pfdev, GPU_AS_PRESENT);
236 pfdev->features.js_present = gpu_read(pfdev, GPU_JS_PRESENT);
237 num_js = hweight32(pfdev->features.js_present);
239 pfdev->features.js_features[i] = gpu_read(pfdev, GPU_JS_FEATURES(i));
241 pfdev->features.shader_present = gpu_read(pfdev, GPU_SHADER_PRESENT_LO);
242 pfdev->features.shader_present |= (u64)gpu_read(pfdev, GPU_SHADER_PRESENT_HI) << 32;
244 pfdev->features.tiler_present = gpu_read(pfdev, GPU_TILER_PRESENT_LO);
245 pfdev->features.tiler_present |= (u64)gpu_read(pfdev, GPU_TILER_PRESENT_HI) << 32;
247 pfdev->features.l2_present = gpu_read(pfdev, GPU_L2_PRESENT_LO);
248 pfdev->features.l2_present |= (u64)gpu_read(pfdev, GPU_L2_PRESENT_HI) << 32;
249 pfdev->features.nr_core_groups = hweight64(pfdev->features.l2_present);
251 pfdev->features.stack_present = gpu_read(pfdev, GPU_STACK_PRESENT_LO);
252 pfdev->features.stack_present |= (u64)gpu_read(pfdev, GPU_STACK_PRESENT_HI) << 32;
254 pfdev->features.thread_tls_alloc = gpu_read(pfdev, GPU_THREAD_TLS_ALLOC);
256 gpu_id = gpu_read(pfdev, GPU_ID);
257 pfdev->features.revision = gpu_id & 0xffff;
258 pfdev->features.id = gpu_id >> 16;
263 if (pfdev->features.id == 0x6956)
264 pfdev->features.id = 0x0600;
266 major = (pfdev->features.revision >> 12) & 0xf;
267 minor = (pfdev->features.revision >> 4) & 0xff;
268 status = pfdev->features.revision & 0xf;
269 rev = pfdev->features.revision;
271 gpu_id = pfdev->features.id;
276 if (!panfrost_model_eq(pfdev, model->id))
296 bitmap_from_u64(pfdev->features.hw_features, hw_feat);
297 bitmap_from_u64(pfdev->features.hw_issues, hw_issues);
299 dev_info(pfdev->dev, "mali-%s id 0x%x major 0x%x minor 0x%x status 0x%x",
301 dev_info(pfdev->dev, "features: %64pb, issues: %64pb",
302 pfdev->features.hw_features,
303 pfdev->features.hw_issues);
305 dev_info(pfdev->dev, "Features: L2:0x%08x Shader:0x%08x Tiler:0x%08x Mem:0x%0x MMU:0x%08x AS:0x%x JS:0x%x",
306 pfdev->features.l2_features,
307 pfdev->features.core_features,
308 pfdev->features.tiler_features,
309 pfdev->features.mem_features,
310 pfdev->features.mmu_features,
311 pfdev->features.as_present,
312 pfdev->features.js_present);
314 dev_info(pfdev->dev, "shader_present=0x%0llx l2_present=0x%0llx",
315 pfdev->features.shader_present, pfdev->features.l2_present);
318 void panfrost_gpu_power_on(struct panfrost_device *pfdev)
323 panfrost_gpu_init_quirks(pfdev);
326 gpu_write(pfdev, L2_PWRON_LO, pfdev->features.l2_present);
327 ret = readl_relaxed_poll_timeout(pfdev->iomem + L2_READY_LO,
328 val, val == pfdev->features.l2_present, 100, 20000);
330 dev_err(pfdev->dev, "error powering up gpu L2");
332 gpu_write(pfdev, SHADER_PWRON_LO, pfdev->features.shader_present);
333 ret = readl_relaxed_poll_timeout(pfdev->iomem + SHADER_READY_LO,
334 val, val == pfdev->features.shader_present, 100, 20000);
336 dev_err(pfdev->dev, "error powering up gpu shader");
338 gpu_write(pfdev, TILER_PWRON_LO, pfdev->features.tiler_present);
339 ret = readl_relaxed_poll_timeout(pfdev->iomem + TILER_READY_LO,
340 val, val == pfdev->features.tiler_present, 100, 1000);
342 dev_err(pfdev->dev, "error powering up gpu tiler");
345 void panfrost_gpu_power_off(struct panfrost_device *pfdev)
347 gpu_write(pfdev, TILER_PWROFF_LO, 0);
348 gpu_write(pfdev, SHADER_PWROFF_LO, 0);
349 gpu_write(pfdev, L2_PWROFF_LO, 0);
352 int panfrost_gpu_init(struct panfrost_device *pfdev)
356 err = panfrost_gpu_soft_reset(pfdev);
360 panfrost_gpu_init_features(pfdev);
362 err = dma_set_mask_and_coherent(pfdev->dev,
363 DMA_BIT_MASK(FIELD_GET(0xff00, pfdev->features.mmu_features)));
367 dma_set_max_seg_size(pfdev->dev, UINT_MAX);
369 irq = platform_get_irq_byname(to_platform_device(pfdev->dev), "gpu");
373 err = devm_request_irq(pfdev->dev, irq, panfrost_gpu_irq_handler,
374 IRQF_SHARED, KBUILD_MODNAME "-gpu", pfdev);
376 dev_err(pfdev->dev, "failed to request gpu irq");
380 panfrost_gpu_power_on(pfdev);
385 void panfrost_gpu_fini(struct panfrost_device *pfdev)
387 panfrost_gpu_power_off(pfdev);
390 u32 panfrost_gpu_get_latest_flush_id(struct panfrost_device *pfdev)
394 if (panfrost_has_hw_feature(pfdev, HW_FEATURE_FLUSH_REDUCTION)) {
396 if (pm_runtime_get_if_in_use(pfdev->dev)) {
397 flush_id = gpu_read(pfdev, GPU_LATEST_FLUSH_ID);
398 pm_runtime_put(pfdev->dev);