Lines Matching defs:ST7701_DSI
120 #define ST7701_DSI(st7701, seq...) \
130 ST7701_DSI(st7701, MIPI_DCS_SOFT_RESET, 0x00);
135 ST7701_DSI(st7701, MIPI_DCS_EXIT_SLEEP_MODE, 0x00);
140 ST7701_DSI(st7701, DSI_CMD2BKX_SEL,
142 ST7701_DSI(st7701, DSI_CMD2_BK0_PVGAMCTRL, 0x00, 0x0E, 0x15, 0x0F,
145 ST7701_DSI(st7701, DSI_CMD2_BK0_NVGAMCTRL, 0x00, 0x0E, 0x95, 0x0F,
148 ST7701_DSI(st7701, DSI_CMD2_BK0_LNESET,
150 ST7701_DSI(st7701, DSI_CMD2_BK0_PORCTRL,
153 ST7701_DSI(st7701, DSI_CMD2_BK0_INVSEL,
157 ST7701_DSI(st7701, DSI_CMD2BKX_SEL,
159 ST7701_DSI(st7701, DSI_CMD2_BK1_VRHS, DSI_CMD2_BK1_VRHA_SET);
160 ST7701_DSI(st7701, DSI_CMD2_BK1_VCOM, DSI_CMD2_BK1_VCOM_SET);
161 ST7701_DSI(st7701, DSI_CMD2_BK1_VGHSS, DSI_CMD2_BK1_VGHSS_SET);
162 ST7701_DSI(st7701, DSI_CMD2_BK1_TESTCMD, DSI_CMD2_BK1_TESTCMD_VAL);
163 ST7701_DSI(st7701, DSI_CMD2_BK1_VGLS, DSI_CMD2_BK1_VGLS_SET);
164 ST7701_DSI(st7701, DSI_CMD2_BK1_PWCTLR1, DSI_CMD2_BK1_PWCTLR1_SET);
165 ST7701_DSI(st7701, DSI_CMD2_BK1_PWCTLR2, DSI_CMD2_BK1_PWCTLR2_SET);
166 ST7701_DSI(st7701, DSI_CMD2_BK1_SPD1, DSI_CMD2_BK1_SPD1_SET);
167 ST7701_DSI(st7701, DSI_CMD2_BK1_SPD2, DSI_CMD2_BK1_SPD2_SET);
168 ST7701_DSI(st7701, DSI_CMD2_BK1_MIPISET1, DSI_CMD2_BK1_MIPISET1_SET);
174 ST7701_DSI(st7701, 0xE0, 0x00, 0x00, 0x02);
175 ST7701_DSI(st7701, 0xE1, 0x0B, 0x00, 0x0D, 0x00, 0x0C, 0x00, 0x0E,
177 ST7701_DSI(st7701, 0xE2, 0x33, 0x33, 0x44, 0x44, 0x64, 0x00, 0x66,
179 ST7701_DSI(st7701, 0xE3, 0x00, 0x00, 0x33, 0x33);
180 ST7701_DSI(st7701, 0xE4, 0x44, 0x44);
181 ST7701_DSI(st7701, 0xE5, 0x0C, 0x78, 0x3C, 0xA0, 0x0E, 0x78, 0x3C,
183 ST7701_DSI(st7701, 0xE6, 0x00, 0x00, 0x33, 0x33);
184 ST7701_DSI(st7701, 0xE7, 0x44, 0x44);
185 ST7701_DSI(st7701, 0xE8, 0x0D, 0x78, 0x3C, 0xA0, 0x0F, 0x78, 0x3C,
187 ST7701_DSI(st7701, 0xEB, 0x02, 0x02, 0x39, 0x39, 0xEE, 0x44, 0x00);
188 ST7701_DSI(st7701, 0xEC, 0x00, 0x00);
189 ST7701_DSI(st7701, 0xED, 0xFF, 0xF1, 0x04, 0x56, 0x72, 0x3F, 0xFF,
193 ST7701_DSI(st7701, DSI_CMD2BKX_SEL,
222 ST7701_DSI(st7701, MIPI_DCS_SET_DISPLAY_ON, 0x00);
231 ST7701_DSI(st7701, MIPI_DCS_SET_DISPLAY_OFF, 0x00);
240 ST7701_DSI(st7701, MIPI_DCS_ENTER_SLEEP_MODE, 0x00);