Lines Matching refs:x00
23 #define MCS_CMD1_UCS 0x00 /* User Command Set (UCS = CMD1) */
46 #define GOA_VSTV1 0x00
149 dcs_write_cmd_seq(ctx, MCS_EXT_PWR_IC, 0xC0, 0x53, 0x00);
156 dcs_write_seq(ctx, MCS_INVCTR, 0x00);
160 dcs_write_seq(ctx, MCS_SETVGN, 0xA0, 0x00);
161 dcs_write_seq(ctx, MCS_SETVGP, 0xA0, 0x00);
168 dcs_write_seq(ctx, 0x04, 0x7D, 0x00, 0x50);
169 dcs_write_cmd_seq(ctx, GOA_VSTV2, 0x05, 0x16, 0x0D, 0x11, 0x7D, 0x00,
171 dcs_write_cmd_seq(ctx, GOA_VCLK1, 0x07, 0x08, 0x01, 0x02, 0x00, 0x7D,
172 0x00, 0x85, 0x08);
173 dcs_write_cmd_seq(ctx, GOA_VCLK2, 0x03, 0x04, 0x05, 0x06, 0x00, 0x7D,
174 0x00, 0x85, 0x08);
175 dcs_write_seq(ctx, GOA_VCLK_OPT1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
176 0x00, 0x00, 0x00, 0x00);
179 dcs_write_seq(ctx, 0x2F, 0x02, 0x00, 0x40, 0x05, 0x08, 0x54, 0x7D,
180 0x00);
181 dcs_write_cmd_seq(ctx, GOA_BICLK2, 0x03, 0x04, 0x05, 0x06, 0x00);
183 dcs_write_seq(ctx, 0x3F, 0x05, 0x08, 0x54, 0x7D, 0x00);
184 dcs_write_seq(ctx, GOA_BICLK3, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
185 0x00, 0x00, 0x00, 0x00, 0x00);
186 dcs_write_seq(ctx, GOA_BICLK4, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
187 0x00, 0x00);
188 dcs_write_seq(ctx, 0x58, 0x00, 0x00, 0x00);
189 dcs_write_seq(ctx, GOA_BICLK_OPT1, 0x00, 0x00, 0x00, 0x00, 0x00);
190 dcs_write_seq(ctx, GOA_BICLK_OPT2, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
191 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00);
192 dcs_write_seq(ctx, MCS_GOA_GPO1, 0x00, 0x00, 0x00, 0x00);
193 dcs_write_seq(ctx, MCS_GOA_GPO2, 0x00, 0x20, 0x00);
195 0x00, 0x00);
196 dcs_write_seq(ctx, MCS_GOA_CLK_GALLON, 0x00, 0x00);
200 0x0A, 0x0E, 0x3F, 0x3F, 0x00);
215 dcs_write_cmd_seq(ctx, MCS_GOA_BS_SEL4, 0x12, 0x16, 0x00, 0x04, 0x3F);
223 dcs_write_cmd_seq(ctx, MCS_GAMMA_VP, 0x00, 0x0C, 0x12, 0x0E, 0x06,
225 0x12, 0x0C, 0x00);
226 dcs_write_cmd_seq(ctx, MCS_GAMMA_VN, 0x00, 0x0C, 0x12, 0x0E, 0x06,
228 0x12, 0x0C, 0x00);