Lines Matching defs:enable
1165 static inline int dsi_if_enable(struct dsi_data *dsi, bool enable)
1167 DSSDBG("dsi_if_enable(%d)\n", enable);
1169 enable = enable ? 1 : 0;
1170 REG_FLD_MOD(dsi, DSI_CTRL, enable, 0, 0); /* IF_EN */
1172 if (!wait_for_bit_change(dsi, DSI_CTRL, 0, enable)) {
1173 DSSERR("Failed to set dsi_if_enable to %d\n", enable);
1815 r = FLD_MOD(r, 1, 22, 22); /* CLKINP_DIVBY2EN = enable */
1816 r = FLD_MOD(r, 1, 23, 23); /* CLKINP_SEL = enable */
2346 static int dsi_vc_enable(struct dsi_data *dsi, int channel, bool enable)
2348 DSSDBG("dsi_vc_enable channel %d, enable %d\n",
2349 channel, enable);
2351 enable = enable ? 1 : 0;
2353 REG_FLD_MOD(dsi, DSI_VC_CTRL(channel), enable, 0, 0);
2355 if (!wait_for_bit_change(dsi, DSI_VC_CTRL(channel), 0, enable)) {
2356 DSSERR("Failed to set dsi_vc_enable to %d\n", enable);
2416 bool enable = source == DSI_VC_SOURCE_VP;
2417 REG_FLD_MOD(dsi, DSI_VC_CTRL(channel), enable, 30, 30);
2428 bool enable)
2432 DSSDBG("dsi_vc_enable_hs(%d, %d)\n", channel, enable);
2439 REG_FLD_MOD(dsi, DSI_VC_CTRL(channel), enable, 9, 9);
2447 if (dsi->vm_timings.ddr_clk_always_on && enable)
3107 DSSERR("ULPS enable timeout\n");
3905 /* enable LP_RX_TO again after the TE */
4108 /* enable interface */
4208 static int dsi_enable_te(struct omap_dss_device *dssdev, bool enable)
4212 dsi->te_enabled = enable;
4891 .enable = dsi_display_enable,
4934 .enable = dsi_pll_enable,