Lines Matching refs:NVDEF
411 NVDEF(NVA0B5, SET_SRC_PHYS_MODE, TARGET, LOCAL_FB));
415 NVDEF(NVA0B5, SET_SRC_PHYS_MODE, TARGET, COHERENT_SYSMEM));
421 launch_dma |= NVDEF(NVA0B5, LAUNCH_DMA, SRC_TYPE, PHYSICAL);
428 NVDEF(NVA0B5, SET_DST_PHYS_MODE, TARGET, LOCAL_FB));
432 NVDEF(NVA0B5, SET_DST_PHYS_MODE, TARGET, COHERENT_SYSMEM));
438 launch_dma |= NVDEF(NVA0B5, LAUNCH_DMA, DST_TYPE, PHYSICAL);
456 NVDEF(NVA0B5, LAUNCH_DMA, DATA_TRANSFER_TYPE, NON_PIPELINED) |
457 NVDEF(NVA0B5, LAUNCH_DMA, FLUSH_ENABLE, TRUE) |
458 NVDEF(NVA0B5, LAUNCH_DMA, SEMAPHORE_TYPE, NONE) |
459 NVDEF(NVA0B5, LAUNCH_DMA, INTERRUPT_TYPE, NONE) |
460 NVDEF(NVA0B5, LAUNCH_DMA, SRC_MEMORY_LAYOUT, PITCH) |
461 NVDEF(NVA0B5, LAUNCH_DMA, DST_MEMORY_LAYOUT, PITCH) |
462 NVDEF(NVA0B5, LAUNCH_DMA, MULTI_LINE_ENABLE, TRUE) |
463 NVDEF(NVA0B5, LAUNCH_DMA, REMAP_ENABLE, FALSE) |
464 NVDEF(NVA0B5, LAUNCH_DMA, BYPASS_L2, USE_PTE_SETTING));
483 NVDEF(NVA0B5, SET_DST_PHYS_MODE, TARGET, LOCAL_FB));
487 NVDEF(NVA0B5, SET_DST_PHYS_MODE, TARGET, COHERENT_SYSMEM));
493 launch_dma |= NVDEF(NVA0B5, LAUNCH_DMA, DST_TYPE, PHYSICAL);
499 NVDEF(NVA0B5, SET_REMAP_COMPONENTS, DST_X, CONST_A) |
500 NVDEF(NVA0B5, SET_REMAP_COMPONENTS, DST_Y, CONST_B) |
501 NVDEF(NVA0B5, SET_REMAP_COMPONENTS, COMPONENT_SIZE, FOUR) |
502 NVDEF(NVA0B5, SET_REMAP_COMPONENTS, NUM_DST_COMPONENTS, TWO));
512 NVDEF(NVA0B5, LAUNCH_DMA, DATA_TRANSFER_TYPE, NON_PIPELINED) |
513 NVDEF(NVA0B5, LAUNCH_DMA, FLUSH_ENABLE, TRUE) |
514 NVDEF(NVA0B5, LAUNCH_DMA, SEMAPHORE_TYPE, NONE) |
515 NVDEF(NVA0B5, LAUNCH_DMA, INTERRUPT_TYPE, NONE) |
516 NVDEF(NVA0B5, LAUNCH_DMA, SRC_MEMORY_LAYOUT, PITCH) |
517 NVDEF(NVA0B5, LAUNCH_DMA, DST_MEMORY_LAYOUT, PITCH) |
518 NVDEF(NVA0B5, LAUNCH_DMA, MULTI_LINE_ENABLE, FALSE) |
519 NVDEF(NVA0B5, LAUNCH_DMA, REMAP_ENABLE, TRUE) |
520 NVDEF(NVA0B5, LAUNCH_DMA, BYPASS_L2, USE_PTE_SETTING));