Lines Matching refs:asyw
41 wndwc37e_csc_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
49 PUSH_MTHD(push, NVC37E, SET_CSC_RED2RED, asyw->csc.matrix, 12);
67 wndwc37e_ilut_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
76 NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, OUTPUT_MODE, asyw->xlut.i.output_mode) |
77 NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, RANGE, asyw->xlut.i.range) |
78 NVVAL(NVC37E, SET_CONTROL_INPUT_LUT, SIZE, asyw->xlut.i.size),
80 SET_OFFSET_INPUT_LUT, asyw->xlut.i.offset >> 8,
81 SET_CONTEXT_DMA_INPUT_LUT, asyw->xlut.handle);
86 wndwc37e_ilut(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw, int size)
91 asyw->xlut.i.size = size == 1024 ? NVC37E_SET_CONTROL_INPUT_LUT_SIZE_SIZE_1025 :
93 asyw->xlut.i.range = NVC37E_SET_CONTROL_INPUT_LUT_RANGE_UNITY;
94 asyw->xlut.i.output_mode = NVC37E_SET_CONTROL_INPUT_LUT_OUTPUT_MODE_INTERPOLATE;
95 asyw->xlut.i.load = head907d_olut_load;
100 wndwc37e_blend_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
110 NVVAL(NVC37E, SET_COMPOSITION_CONTROL, DEPTH, asyw->blend.depth),
113 NVVAL(NVC37E, SET_COMPOSITION_CONSTANT_ALPHA, K1, asyw->blend.k1) |
118 asyw->blend.src_color) |
120 asyw->blend.src_color) |
122 asyw->blend.dst_color) |
124 asyw->blend.dst_color),
162 wndwc37e_image_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
171 NVVAL(NVC37E, SET_PRESENT_CONTROL, MIN_PRESENT_INTERVAL, asyw->image.interval) |
172 NVVAL(NVC37E, SET_PRESENT_CONTROL, BEGIN_MODE, asyw->image.mode) |
176 NVVAL(NVC37E, SET_SIZE, WIDTH, asyw->image.w) |
177 NVVAL(NVC37E, SET_SIZE, HEIGHT, asyw->image.h),
180 NVVAL(NVC37E, SET_STORAGE, BLOCK_HEIGHT, asyw->image.blockh) |
181 NVVAL(NVC37E, SET_STORAGE, MEMORY_LAYOUT, asyw->image.layout),
184 NVVAL(NVC37E, SET_PARAMS, FORMAT, asyw->image.format) |
185 NVVAL(NVC37E, SET_PARAMS, COLOR_SPACE, asyw->image.colorspace) |
189 NVVAL(NVC37E, SET_PARAMS, CSC, asyw->csc.valid) |
194 NVVAL(NVC37E, SET_PLANAR_STORAGE, PITCH, asyw->image.blocks[0]) |
195 NVVAL(NVC37E, SET_PLANAR_STORAGE, PITCH, asyw->image.pitch[0] >> 6));
197 PUSH_MTHD(push, NVC37E, SET_CONTEXT_DMA_ISO(0), asyw->image.handle, 1);
198 PUSH_MTHD(push, NVC37E, SET_OFFSET(0), asyw->image.offset[0] >> 8);
201 NVVAL(NVC37E, SET_POINT_IN, X, asyw->state.src_x >> 16) |
202 NVVAL(NVC37E, SET_POINT_IN, Y, asyw->state.src_y >> 16));
205 NVVAL(NVC37E, SET_SIZE_IN, WIDTH, asyw->state.src_w >> 16) |
206 NVVAL(NVC37E, SET_SIZE_IN, HEIGHT, asyw->state.src_h >> 16));
209 NVVAL(NVC37E, SET_SIZE_OUT, WIDTH, asyw->state.crtc_w) |
210 NVVAL(NVC37E, SET_SIZE_OUT, HEIGHT, asyw->state.crtc_h));
228 wndwc37e_ntfy_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
236 PUSH_MTHD(push, NVC37E, SET_CONTEXT_DMA_NOTIFIER, asyw->ntfy.handle,
239 NVVAL(NVC37E, SET_NOTIFIER_CONTROL, MODE, asyw->ntfy.awaken) |
240 NVVAL(NVC37E, SET_NOTIFIER_CONTROL, OFFSET, asyw->ntfy.offset >> 4));
258 wndwc37e_sema_set(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw)
266 PUSH_MTHD(push, NVC37E, SET_SEMAPHORE_CONTROL, asyw->sema.offset,
267 SET_SEMAPHORE_ACQUIRE, asyw->sema.acquire,
268 SET_SEMAPHORE_RELEASE, asyw->sema.release,
269 SET_CONTEXT_DMA_SEMAPHORE, asyw->sema.handle);
294 wndwc37e_release(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
300 wndwc37e_acquire(struct nv50_wndw *wndw, struct nv50_wndw_atom *asyw,
303 return drm_atomic_helper_check_plane_state(&asyw->state, &asyh->state,