Lines Matching refs:asyh
40 struct nv50_head_atom *asyh, bool flush)
43 .mask = asyh->clr.mask & ~(flush ? 0 : asyh->set.mask),
52 nv50_head_flush_set_wndw(struct nv50_head *head, struct nv50_head_atom *asyh)
54 if (asyh->set.curs ) head->func->curs_set(head, asyh);
55 if (asyh->set.olut ) {
56 asyh->olut.offset = nv50_lut_load(&head->olut,
57 asyh->olut.buffer,
58 asyh->state.gamma_lut,
59 asyh->olut.load);
60 head->func->olut_set(head, asyh);
65 nv50_head_flush_set(struct nv50_head *head, struct nv50_head_atom *asyh)
67 if (asyh->set.view ) head->func->view (head, asyh);
68 if (asyh->set.mode ) head->func->mode (head, asyh);
69 if (asyh->set.core ) head->func->core_set(head, asyh);
70 if (asyh->set.base ) head->func->base (head, asyh);
71 if (asyh->set.ovly ) head->func->ovly (head, asyh);
72 if (asyh->set.dither ) head->func->dither (head, asyh);
73 if (asyh->set.procamp) head->func->procamp (head, asyh);
74 if (asyh->set.crc ) nv50_crc_atomic_set (head, asyh);
75 if (asyh->set.or ) head->func->or (head, asyh);
80 struct nv50_head_atom *asyh,
86 asyh->procamp.sat.cos = ((vib * 2047 + adj) / 100) & 0xfff;
87 asyh->procamp.sat.sin = ((hue * 2047) / 100) & 0xfff;
88 asyh->set.procamp = true;
93 struct nv50_head_atom *asyh,
100 if (asyh->base.depth > asyh->or.bpc * 3)
107 if (asyh->or.bpc >= 8)
114 asyh->dither.enable = NVVAL_GET(mode, NV507D, HEAD_SET_DITHER_CONTROL, ENABLE);
115 asyh->dither.bits = NVVAL_GET(mode, NV507D, HEAD_SET_DITHER_CONTROL, BITS);
116 asyh->dither.mode = NVVAL_GET(mode, NV507D, HEAD_SET_DITHER_CONTROL, MODE);
117 asyh->set.dither = true;
122 struct nv50_head_atom *asyh,
126 struct drm_display_mode *omode = &asyh->state.adjusted_mode;
127 struct drm_display_mode *umode = &asyh->state.mode;
151 asyh->view.iW = umode->hdisplay;
152 asyh->view.iH = umode_vdisplay;
155 asyh->view.oW = omode_hdisplay;
156 asyh->view.oH = omode_vdisplay;
167 u32 r = (asyh->view.oH << 19) / asyh->view.oW;
170 asyh->view.oW -= (bX * 2);
171 if (bY) asyh->view.oH -= (bY * 2);
172 else asyh->view.oH = ((asyh->view.oW * r) + (r / 2)) >> 19;
174 asyh->view.oW -= (asyh->view.oW >> 4) + 32;
175 if (bY) asyh->view.oH -= (bY * 2);
176 else asyh->view.oH = ((asyh->view.oW * r) + (r / 2)) >> 19;
188 asyh->view.oW = min(asyh->view.iW, asyh->view.oW);
189 asyh->view.oH = min(asyh->view.iH, asyh->view.oH);
207 if (asyh->view.oW * asyh->view.iH > asyh->view.iW * asyh->view.oH) {
209 u32 r = (asyh->view.iW << 19) / asyh->view.iH;
210 asyh->view.oW = ((asyh->view.oH * r) + (r / 2)) >> 19;
213 u32 r = (asyh->view.iH << 19) / asyh->view.iW;
214 asyh->view.oH = ((asyh->view.oW * r) + (r / 2)) >> 19;
221 asyh->set.view = true;
226 struct nv50_head_atom *asyh)
229 struct drm_property_blob *olut = asyh->state.gamma_lut;
237 if (asyh->wndw.olut) {
241 if (asyh->wndw.olut != asyh->wndw.mask)
249 asyh->olut.handle = 0;
257 if (!head->func->olut(head, asyh, size)) {
261 asyh->olut.handle = disp->core->chan.vram.handle;
262 asyh->olut.buffer = !asyh->olut.buffer;
268 nv50_head_atomic_check_mode(struct nv50_head *head, struct nv50_head_atom *asyh)
270 struct drm_display_mode *mode = &asyh->state.adjusted_mode;
271 struct nv50_head_mode *m = &asyh->mode;
311 asyh->or.nhsync = !!(mode->flags & DRM_MODE_FLAG_NHSYNC);
312 asyh->or.nvsync = !!(mode->flags & DRM_MODE_FLAG_NVSYNC);
313 asyh->set.or = head->func->or != NULL;
314 asyh->set.mode = true;
323 struct nv50_head_atom *asyh = nv50_head_atom(state);
329 NV_ATOMIC(drm, "%s atomic_check %d\n", crtc->name, asyh->state.active);
330 if (asyh->state.active) {
331 for_each_new_connector_in_state(asyh->state.state, conn, conns, i) {
340 if (asyh->state.mode_changed)
342 if (armh->base.depth != asyh->base.depth)
348 asyh->set.mask = ~0;
349 asyh->set.or = head->func->or != NULL;
352 if (asyh->state.mode_changed || asyh->state.connectors_changed)
353 nv50_head_atomic_check_mode(head, asyh);
355 if (asyh->state.color_mgmt_changed ||
356 memcmp(&armh->wndw, &asyh->wndw, sizeof(asyh->wndw))) {
357 int ret = nv50_head_atomic_check_lut(head, asyh);
361 asyh->olut.visible = asyh->olut.handle != 0;
366 nv50_head_atomic_check_view(armh, asyh, asyc);
368 nv50_head_atomic_check_dither(armh, asyh, asyc);
370 nv50_head_atomic_check_procamp(armh, asyh, asyc);
374 head->func->core_calc(head, asyh);
375 if (!asyh->core.visible)
376 asyh->olut.visible = false;
379 asyh->set.base = armh->base.cpp != asyh->base.cpp;
380 asyh->set.ovly = armh->ovly.cpp != asyh->ovly.cpp;
382 asyh->olut.visible = false;
383 asyh->core.visible = false;
384 asyh->curs.visible = false;
385 asyh->base.cpp = 0;
386 asyh->ovly.cpp = 0;
389 if (!drm_atomic_crtc_needs_modeset(&asyh->state)) {
390 if (asyh->core.visible) {
391 if (memcmp(&armh->core, &asyh->core, sizeof(asyh->core)))
392 asyh->set.core = true;
395 asyh->clr.core = true;
398 if (asyh->curs.visible) {
399 if (memcmp(&armh->curs, &asyh->curs, sizeof(asyh->curs)))
400 asyh->set.curs = true;
403 asyh->clr.curs = true;
406 if (asyh->olut.visible) {
407 if (memcmp(&armh->olut, &asyh->olut, sizeof(asyh->olut)))
408 asyh->set.olut = true;
411 asyh->clr.olut = true;
414 asyh->clr.olut = armh->olut.visible;
415 asyh->clr.core = armh->core.visible;
416 asyh->clr.curs = armh->curs.visible;
417 asyh->set.olut = asyh->olut.visible;
418 asyh->set.core = asyh->core.visible;
419 asyh->set.curs = asyh->curs.visible;
422 ret = nv50_crc_atomic_check_head(head, asyh, armh);
426 if (asyh->clr.mask || asyh->set.mask)
427 nv50_atom(asyh->state.state)->lock_core = true;
441 struct nv50_head_atom *asyh = nv50_head_atom(state);
442 __drm_atomic_helper_crtc_destroy_state(&asyh->state);
443 kfree(asyh);
450 struct nv50_head_atom *asyh;
451 if (!(asyh = kmalloc(sizeof(*asyh), GFP_KERNEL)))
453 __drm_atomic_helper_crtc_duplicate_state(crtc, &asyh->state);
454 asyh->wndw = armh->wndw;
455 asyh->view = armh->view;
456 asyh->mode = armh->mode;
457 asyh->olut = armh->olut;
458 asyh->core = armh->core;
459 asyh->curs = armh->curs;
460 asyh->base = armh->base;
461 asyh->ovly = armh->ovly;
462 asyh->dither = armh->dither;
463 asyh->procamp = armh->procamp;
464 asyh->crc = armh->crc;
465 asyh->or = armh->or;
466 asyh->dp = armh->dp;
467 asyh->clr.mask = 0;
468 asyh->set.mask = 0;
469 return &asyh->state;
475 struct nv50_head_atom *asyh;
477 if (WARN_ON(!(asyh = kzalloc(sizeof(*asyh), GFP_KERNEL))))
483 __drm_atomic_helper_crtc_reset(crtc, &asyh->state);