Lines Matching refs:crc
19 #include "crc.h"
77 core->func->crc->set_ctx(head, ctx);
84 struct nv50_crc *crc = container_of(work, struct nv50_crc, flip_work);
85 struct nv50_head *head = container_of(crc, struct nv50_head, crc);
88 u8 new_idx = crc->ctx_idx ^ 1;
106 drm_crtc_index(crtc), crc->ctx_idx, new_idx);
109 nv50_crc_program_ctx(head, &crc->ctx[new_idx]);
112 spin_lock_irq(&crc->lock);
113 crc->ctx_changed = true;
114 spin_unlock_irq(&crc->lock);
128 struct nv50_crc *crc = &head->crc;
131 while (crc->entry_idx < func->num_entries) {
137 output_crc = func->get_entry(head, &crc->ctx[crc->ctx_idx],
138 source, crc->entry_idx);
142 drm_crtc_add_crc_entry(crtc, true, crc->frame, &output_crc);
143 crc->frame++;
144 crc->entry_idx++;
151 struct nv50_crc *crc = &head->crc;
153 nv50_disp(head->base.base.dev)->core->func->crc;
165 if (!spin_trylock(&crc->lock))
168 if (!crc->src)
171 ctx = &crc->ctx[crc->ctx_idx];
172 if (crc->ctx_changed && func->ctx_finished(head, ctx)) {
173 nv50_crc_get_entries(head, func, crc->src);
175 crc->ctx_idx ^= 1;
176 crc->entry_idx = 0;
177 crc->ctx_changed = false;
194 head->base.index, crc->frame);
195 crc->frame++;
201 nv50_crc_get_entries(head, func, crc->src);
204 drm_vblank_work_schedule(&crc->flip_work,
206 + crc->flip_threshold
207 - crc->entry_idx,
211 spin_unlock(&crc->lock);
243 struct nv50_crc *crc = &head->crc;
245 if (!asyh->clr.crc)
248 spin_lock_irq(&crc->lock);
249 crc->src = NV50_CRC_SOURCE_NONE;
250 spin_unlock_irq(&crc->lock);
253 drm_vblank_work_cancel_sync(&crc->flip_work);
275 struct nv50_crc *crc = &head->crc;
278 if (!asyh->set.crc)
281 crc->entry_idx = 0;
282 crc->ctx_changed = false;
283 for (i = 0; i < ARRAY_SIZE(crc->ctx); i++)
284 nv50_crc_reset_ctx(&crc->ctx[i]);
291 nv50_disp(state->dev)->core->func->crc;
299 struct nv50_crc *crc = &head->crc;
300 struct nv50_crc_notifier_ctx *ctx = &crc->ctx[crc->ctx_idx];
302 if (!asyh->clr.crc)
305 if (crc->ctx_changed) {
307 ctx = &crc->ctx[crc->ctx_idx ^ 1];
322 struct nv50_crc *crc = &head->crc;
325 if (!asyh->set.crc)
330 spin_lock_irq(&crc->lock);
332 crc->frame = vbl_count;
333 crc->src = asyh->crc.src;
334 drm_vblank_work_schedule(&crc->flip_work,
335 vbl_count + crc->flip_threshold,
337 spin_unlock_irq(&crc->lock);
352 bool changed = armh->crc.src != asyh->crc.src;
354 if (!armh->crc.src && !asyh->crc.src) {
355 asyh->set.crc = false;
356 asyh->clr.crc = false;
364 if (asyh->crc.src && disp->disp->object.oclass >= GV100_DISP &&
365 !(BIT(asyh->crc.wndw) & asyh->wndw.owned)) {
379 asyh->crc.wndw = ffs(asyh->wndw.owned) - 1;
383 armh->crc.wndw != asyh->crc.wndw) {
384 asyh->clr.crc = armh->crc.src && armh->state.active;
385 asyh->set.crc = asyh->crc.src && asyh->state.active;
390 if (asyh->clr.crc && asyh->set.crc)
393 asyh->set.crc = false;
394 asyh->clr.crc = false;
427 if (!asyh->clr.crc)
474 struct nv50_crc *crc = &head->crc;
475 const struct nv50_crc_func *func = nv50_disp(dev)->core->func->crc;
488 nv50_crc_source_type(outp, asyh->crc.src),
489 &crc->ctx[crc->ctx_idx], asyh->crc.wndw);
495 nv50_disp(head->base.base.dev)->core->func->crc;
566 struct nv50_crc *crc = &head->crc;
567 const struct nv50_crc_func *func = nv50_disp(dev)->core->func->crc;
594 for (i = 0; i < ARRAY_SIZE(head->crc.ctx); i++) {
595 ret = nv50_crc_ctx_init(head, mmu, &crc->ctx[i],
612 asyh->crc.src = source;
626 crc->flip_threshold = func->flip_threshold;
633 for (i = 0; i < ARRAY_SIZE(crc->ctx); i++)
634 nv50_crc_ctx_fini(&crc->ctx[i]);
652 struct nv50_crc *crc = &head->crc;
659 seq_printf(m, "%d\n", crc->flip_threshold);
682 struct nv50_crc *crc = &head->crc;
684 nv50_disp(crtc->dev)->core->func->crc;
703 if (armh->crc.src) {
711 crc->flip_threshold = value;
731 nv50_disp(crtc->dev)->core->func->crc;
748 struct nv50_crc *crc = &head->crc;
750 crc->flip_threshold = func->flip_threshold;
751 spin_lock_init(&crc->lock);
752 drm_vblank_work_init(&crc->flip_work, &head->base.base,
760 const struct nv50_crc_func *func = disp->core->func->crc;