Lines Matching refs:head
54 int head;
62 head = (dacclk & 0x100) >> 8;
67 fp_htotal = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL);
68 fp_hsync_start = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START);
69 fp_hsync_end = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END);
70 fp_control = NVReadRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL);
72 ctv_1c = NVReadRAMDAC(dev, head, 0x680c1c);
73 ctv_14 = NVReadRAMDAC(dev, head, 0x680c14);
74 ctv_6c = NVReadRAMDAC(dev, head, 0x680c6c);
80 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, 1343);
81 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, 1047);
82 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END, 1183);
83 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL,
98 NVWriteRAMDAC(dev, head, 0x680c1c, 1 << 20);
99 NVWriteRAMDAC(dev, head, 0x680c14, 4 << 16);
102 NVWriteRAMDAC(dev, head, 0x680c6c, testval >> 10 & 0x3ff);
108 NVWriteRAMDAC(dev, head, 0x680c6c, testval & 0x3ff);
114 NVWriteRAMDAC(dev, head, 0x680c1c, ctv_1c);
115 NVWriteRAMDAC(dev, head, 0x680c14, ctv_14);
116 NVWriteRAMDAC(dev, head, 0x680c6c, ctv_6c);
119 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_TG_CONTROL, fp_control);
120 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_END, fp_hsync_end);
121 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HSYNC_START, fp_hsync_start);
122 NVWriteRAMDAC(dev, head, NV_PRAMDAC_FP_HTOTAL, fp_htotal);
402 int head = nouveau_crtc(encoder->crtc)->index;
403 uint8_t *cr_lcd = &nv04_display(dev)->mode_reg.crtc_reg[head].CRTC[
411 nv04_dfp_disable(dev, head);
413 /* Unbind any FP encoders from this head if we need the FP
418 list_for_each_entry(enc, &dev->mode_config.encoder_list, head) {
424 nv04_dfp_get_bound_head(dev, dcb) == head) {
425 nv04_dfp_bind_head(dev, dcb, head ^ 1,
433 *cr_lcd |= 0x1 | (head ? 0x0 : 0x8);
444 if (head)
463 int head = nouveau_crtc(encoder->crtc)->index;
464 struct nv04_crtc_reg *regs = &nv04_display(dev)->mode_reg.crtc_reg[head];
477 if (head)
527 * encoder in its OR enabled and routed to the head it's