Lines Matching defs:state
79 struct nv04_mode_state *state = &nv04_display(dev)->mode_reg;
85 state->pllsel &= ~(PLLSEL_TV_CRTC1_MASK | PLLSEL_TV_CRTC2_MASK);
91 state->pllsel |= head ? PLLSEL_TV_CRTC2_MASK :
100 NVWriteRAMDAC(dev, 0, NV_PRAMDAC_PLL_COEFF_SELECT, state->pllsel);
107 struct nv04_crtc_reg *state = &nv04_display(dev)->mode_reg.crtc_reg[head];
109 state->tv_setup = 0;
112 state->CRTC[NV_CIO_CRE_49] |= 0x10;
114 state->CRTC[NV_CIO_CRE_49] &= ~0x10;
117 state->CRTC[NV_CIO_CRE_LCD__INDEX]);
119 state->CRTC[NV_CIO_CRE_49]);
121 state->tv_setup);